Design of Skimming HDR CMOS image sensor
The Goal is to design a 128x128 pixel (or more) CMOS image sensor with 16-bit dynamic range.
Regular CIS has only 10-bit DR which often results in saturated (clipped) pixel values when the light level is too high (e.g. combined outdoor/indoor scenes, sunlight, lamps, etc). The sensor is to use a readout technique called 'skimming HDR' or 'lateral overflow HDR' and basic principle is available in IEEE publications and patents. The Project involves researching novel timing and control schemes for optimal performance. Project can be divided into one analog design part (pixels, row/col addressing, and readout circuitry) and one digital part (timing&control implemented in FPGA).