Study of processor architectures for CMOS camera sensors.

CMOS image sensors require digital timing and control circuitry which can be implemented in pure gates (programmed in RTL) or in some processor with instruction and data memory. The goal is to work on the latter, in particular to identify an optimal processor for CMOS image sensors with regard to power consumption (<300mW), speed (100MHz pixel clock), and die size (1Mgates). New custom made processors should also be considered in this study.

Emneord: Digital Circuit Design
Publisert 12. sep. 2013 13:00 - Sist endret 13. sep. 2013 09:45


Omfang (studiepoeng)