A Routing Architecture for Mapping Dataflow Graphs at Run-time
Abstract
While it is feasible with today's commercial tools to swap from one module to another, many applications demand more advanced configuration schemes, for example, to map different dataflow graphs onto an FPGA.
To support this, we will improve an existing on-FPGA communication architecture in order to carry out arbitrary routing among multiple freely placed modules.
This results in a circuit switching network that will be efficiently implemented directly within the FPGA routing fabric.
Bibtex
@INPROCEEDINGS{fpl11koch,
AUTHOR = {{Koch}, {Dirk} and {Jim}, {Torresen}},
ADDRESS = {Chania, Greece},
BOOKTITLE = {Proceedings of 21st International Conference on Field-Programmable Logic and Applications (FPL 11)},
MONTH = sep,
TITLE = {{A Routing Architecture for Mapping Dataflow Graphs at Run-time}},
PAGES = {286--290},
YEAR = {2011}
}