Module Placement on FPGAs: Online FPGATris

 

When FPGAs (Field Programmable Gate Arrays) are reconfigured at runtime, module placement positions have to be determined. In the case of a two-dimensional layout of the reconfigurable chip, the packing problem has three dimensions when considering the execution time of the modules. This problem can be seen as solving a 3-D version of the game Tetris. Modules (our Tetris bricks) posses an arbitrary shaped groundplane and a height corresponding to their execution time. The task is to pack a random sequence of modules onto a two dimensional ground plane (the FPGA) such that the total execution time (the height of all the packed modules) is minimized.

 
Exactly solving such combinatory problems requires an enormous amount of processing power. Consequently, adequate heuristics will have to be developed that can be used to place modules in an embedded system at runtime. In this master thesis, evolvable techniques will be used to generate the placement heuristics. These techniques have already demonstrated brilliant performance for similar packing problems.

 

Prerequisites: INF1400, INF 2270, INF3430/4430
Apportionment: Theory (30%), Concepts (40%), Implementation (30%)
Supervisors: Dirk Koch, Jim Tørresen

 

 

 

Published Mar. 4, 2010 5:38 PM - Last modified Apr. 4, 2011 11:06 AM