The Spartan-6 architecture provides not only lower power with high performance at low cost, it also features a brilliant platform for implementing run-time reconfigurable systems. These devices can be internally reconfigured (using ICAP) in a fine-grained subcolumn-wise manner without affecting other parts of the system and they provide relatively large homogeneous areas without I/O pins. Spartan-6 FPGAs state an ideal platform for all the fancy PR things, including module relocation or multi module instantiation. We will release GoAhead soon to allow everybody to easily exploit these things on Spartan-6.
Spartan-6 PR Demo at the FCCM
Demo on Partial Run-time Reconfiguration on Spartan-6 FPGAs at the FCCM Demo Night.
In addition to a publication at the FCCM 2010, we contributed with a demo at the FCCM Demo Night. Here, we showed partial run-time reconfiguration on the recent Spartan-6 architecture. The demo was based on our new tool GoAhead that provides more functionality and a better device support combined with an easier to use design flow (as compared to the Xilinx vendor tool flow for partial run-time reconfiguration).
Published May 7, 2010 5:59 PM
- Last modified June 28, 2011 9:33 AM