Advanced Partial Run-time Reconfiguration on Spartan-6 FPGAs
Abstract
In this paper, we demonstrate systems based on Spartan-6 series FPGAs that provide full support for active partial run-time reconfiguration. We will summarize design factors for successfully applying run-time reconfiguration, reveal details on partial reconfiguration on Spartan-6 FPGAs, and introduce our easy to use design flow. In this flow, a module can multiple times be instantiated or even migrated to different systems without the need to physically reimplement such a module. The demo systems can host manifold different partial modules that each are capable to manipulate a video stream.
Bibtex
@INPROCEEDINGS{fpt10koch_demo,
AUTHOR = {{Koch}, {Dirk} and {Beckhoff}, {Christian} and {Torresen}, {Jim}},
ADDRESS = {{Beijing, China}},
BOOKTITLE = {{Proceedings of International Conference on Field-Programmable Technology (ICFPT\'10)}},
PUBLISHER = {IEEE},
MONTH = dez,
NOTE = {to apear},
TITLE = {{Demo Paper: Advanced Partial Run-time Reconfiguration on Spartan-6 FPGAs}},
YEAR = {2010},
}