COSRECOS Publications

Publications and Presentations

2012    2011    2010    2009    2008    2007    till 2006  

 

2013


  • Dirk Koch, Christian Beckhoff, Guy G.F. Lemieux
    An Efficient FPGA Overlay for Portable Custom Instruction Set Extensions
    23rd International Conference on Field Programmable Logic and Applications(FPL2013), Porto, September, 2013.

  • Alexander Wold, Andreas Agne and Jim Tørresen:
    Generation of Multi-core Systems from Multithreaded Software
    23rd International Conference on Field Programmable Logic and Applications(FPL2013), Porto, September, 2013.
  • Jochen Vandorpe, Jo Vliegen, Ruben Smeets, Nele Mentens, Milos Drutarovsky, Michal Varchola, Kerstin Lemke-Rust, Peter Samarin, Paul Plöger, Dirk Koch, Yngve Hafting and Jim Tørresen
    Demo: Remote FPGA design through eDiViDe - European Digital Virtual Design Lab
    23rd International Conference on Field Programmable Logic and Applications(FPL2013), Porto, September, 2013.

  • Christian Beckhoff, Alexander Wold, Anders Fritzell, Dirk Koch and Jim Tørresen
    Demo: Building Partial Systems with GOAHEAD
    23rd International Conference on Field Programmable Logic and Applications(FPL2013), Porto, September, 2013.

  • Alexander Wold, Dirk Koch and Jim Tørresen:
    Component Based Design using Constraint Programming for Module Placement on FPGAs
    8th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (RECOSOC2013), Darmstadt, July, 2013. Paper ©¹
  • Alexander Wold, Dirk Koch and Jim Tørresen:
    Thermal Aware Module Placement for Heterogeneous 3D-IC Based FPGAs
    20th Reconfigurable Architectures Workshop (RAW2013), Boston, Massachusetts, May, 2013.
     Paper ©¹
  • Christian Beckhoff, Dirk Koch and Jim Tørresen:
    Automatic Floorplanning and Interface Synthesis of Island Style Reconfigurable Systems with GoAhead
    26th International Conference on Architecture of Computing Systems (ARCS), Prague, Czech Republic, Feb. 2012.

 

2012


  • Dirk Koch, Christian Beckhoff, Alexander Wold and Jim Torresen
    Design Tools For Self-Aware Systems on FPGAs
    Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), Oslo, Norway, September 2012.
     
  • Dirk Koch
    Partial Reconfiguration on FPGAs – Architectures, Tools, and Applications
    295 pages, Springer, ISBN 978-1-4614-1224-3, 2012.
     
  • Sandor Fekete, Tom Kamphans, Nils Schweer, Christopher Tessars, Jan van der Veen, Josef Angermeier, Dirk Koch, and Juergen Teich:
    Dynamic Defragmentation of Reconfigurable Devices
    ACM Transactions on Reconfigurable Technology and Systems, vol. 5 no. 2, June 2012.
     Bibtex & Abstract
     
  • Christian Beckhoff, Dirk Koch and Jim Tørresen:
    GoAhead: A Partial Reconfiguration Framework
    20th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2012.
     Paper ©¹      Bibtex & Abstract
  • Alexander Wold, Dirk Koch and Jim Tørresen:
    Design Techniques for Increasing Performance and Resource Utilization of Reconfigurable Soft CPUs
    15th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), April 2012.
     Paper ©¹      Bibtex & Abstract
     
  • Dirk Koch, Jim Torresen, Christian Beckhoff, Daniel Ziener, Christopher Dennl, Volker Breuer, Juergen Teich, Michael Feilen and Walter Stechele:
    Partial Reconfiguration on FPGAs in Practice – Tools and Applications
    Workshop on Architecture of Computing Systems (ARCS Workshop), February 2012.
     Paper ©¹      Bibtex & Abstract
     

2011


  • Jim Tørresen and Dirk Koch:
    Can Run-time Reconfigurable Hardware be more Accessible?
    International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2011.
     
  • Dirk Koch and Jim Tørresen:
    A Routing Architecture for Mapping Dataflow Graphs at Run-Time
    21th International Conference on Field Programmable Logic and Applications (FPL), 2011.
     Paper ©¹      Bibtex & Abstract
     
  • Christian Beckhoff, Dirk Koch and Jim Tørresen:
    Migrating Static Systems to Partially Reconfigurable Systems on Spartan-6 FPGAs
    18th Reconfigurable Architectures Workshop (RAW2011), Anchorage, Alaska, May, 2011.
     Paper ©¹      Bibtex & Abstract
     
  • Simen Gimle Hansen, Dirk Koch and Jim Tørresen:
    High Speed Partial Run-Time Reconfiguration Using Enhanced ICAP Hard Macro
    18th Reconfigurable Architectures Workshop (RAW2011), Anchorage, Alaska, May, 2011.
     Paper ©¹      Bibtex & Abstract
  • Alexander Wold, Dirk Koch and Jim Tørresen:
    Enhancing Resource Utilization with Design Alternatives in Runtime Reconfigurable Systems
    18th Reconfigurable Architectures Workshop (RAW2011), Anchorage, Alaska, May, 2011.
     Paper ©¹      Bibtex & Abstract
  • Christian Beckhoff, Dirk Koch and Jim Tørresen:
    The Xilinx Design Language (XDL): Tutorial and Use Cases
    In Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 8 pages, Montpellier, France, 2011.
    Paper ©¹     Bibtex & Abstract
     
  • Dirk Koch and Jim Tørresen:
    FPGASort: A High Performance Sorting Architecture Exploiting Run-time Reconfiguration on FPGAs for Large Problem Sorting
    In Proceedings of the 19th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2011), Monterey, CA, pp. 45-54, February 28 - March 1, 2011.
    Paper ©²    Bibtex & Abstract
     

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2010


  • Dirk Koch, Christian Beckhoff and Jim Tørresen:
    Obstacle-free Two-dimensional Online-Routing for Run-time Reconfigurable FPGA-based Systems
    In Proceedings of the IEEE International Conference on Field-Programmable Technology (ICFPT'10), Beijing, China, December, 2010.
    Paper ©¹     Bibtex & Abstract
     
  • Dirk Koch and Jim Tørresen:
    Routing Optimizations for Component-based System Design and Partial Run-time Reconfiguration on FPGAs
    In Proceedings of the IEEE International Conference on Field-Programmable Technology (ICFPT'10), Beijing, China, December, 2010.
    Paper ©¹     Bibtex & Abstract
     
  • Dirk Koch, Christian Beckhoff and Jim Tørresen:
    Demo Paper: Advanced Partial Run-time Reconfiguration on Spartan-6 FPGAs
    In Proceedings of the IEEE International Conference on Field-Programmable Technology (ICFPT'10), Beijing, China, December, 2010.
    Paper ©¹     Bibtex & Abstract
     
  • Christian Beckhoff, Dirk Koch and Jim Tørresen:
    Short-Circuits on FPGAs caused by Partial Runtime Reconfiguration
    In Proceedings of International Conference on Field-Programmable Logic and Applications (FPL'10), pp. 596-601, Milan, Italy, 2010.
    Paper ©¹     Bibtex & Abstract
     
  • Andreas Oetken, Stefan Wildermann, Juergen Teich and Dirk Koch:
    A Bus-based SoC Architecture for Flexible Module Placement on Reconfigurable FPGAs
    In Proceedings of International Conference on Field-Programmable Logic and Applications (FPL'10), pp. 234-239, Milan, Italy, 2010.
    Paper ©¹     Bibtex & Abstract
     
  • Dirk Koch, Christian Beckhoff and Jim Tørresen:
    Zero Logic Overhead Integration of Partially Reconfigurable Modules
    In 23rd Symposium on Integrated Circuits and Systems Design (SBCCI), Sao Paulo, Brasil, September, 2010.
    Paper ©²     Bibtex & Abstract
     
  • Jim Tørresen and Dirk Koch:
    A New Project to Address Run-Time Recofigurable Hardware Systems
    Dagstuhl Seminar 10281: Dynamically Reconfigurable Architectures, Schloss Dagstuhl, Germany, July, 2010.
    Paper     Bibtex & Abstract    
     
  • Dirk Koch and Jim Tørresen:
    Advances and Trends in Dynamic Partial Run-time Reconfiguration
    Dagstuhl Seminar 10281: Dynamically Reconfigurable Architectures, Schloss Dagstuhl, Germany, July, 2010.
    Paper     Bibtex & Abstract    
     
  • Dirk Koch, Christian Beckhoff and Jim Tørresen:
    Fine-grained Partial Runtime Reconfiguration on Virtex-5 FPGAs
    In 18th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), Charlotte, North Carolina, USA, May, 2010.
    Paper ©¹     Bibtex & Abstract 
     
  • Dirk Koch:
    Partial Runtime Reconfiguration for Industrial Applications  – Methods and Tools
    Talk at the FPGA-forum in Trondhein (Norway) Feb. 2010.
    Slides    

 

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2009


  • Dirk Koch, Christian Beckhoff and Jürgen Teich:
    Hardware Decompression Techniques for FPGA-based Embedded Systems
    In ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol.2, no. 9, June 2009.
    Publication ©²     Bibtex & Abstract
     
  • Dirk Koch, Christian Beckhoff, Christian Haubelt and Jürgen Teich:
    ReCoBus-Builder: a Novel Tool for Component-based System Design on FPGAs
    University Booth at Conference on Design Automation and Test in Europe (DATE), Nice, France, April, 2009.  
    Poster ©¹     Proceedings
     
  • Dirk Koch, Christian Beckhoff and Jürgen Teich:
    Minimizing Internal Fragmentation by Fine-grained Two-dimensional Module Placement for Runtime Reconfigurable Systems
    In 17th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), Napa, California, April, 2009.
    Paper ©¹     Bibtex & Abstract
     
  • Dirk Koch, Christian Beckhoff and Jürgen Teich:
    A Communication Architecture for Complex Runtime Reconfigurable Systems and its Implementation on Spartan-3 FPGAs
    In 17th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), Monterey, CA, February 22-24, 2009.
    Extended Paper ©²     Bibtex & Abstract
     

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2008


  • J. Torresen, G. A. Senland, K. Glette:
    Partial Reconfiguration Applied in an On-line Evolvable Pattern Recognition System. 26th Norchip Conference, pages 61-64, IEEE Nov 2008. 
     Paper ©¹
     
  • Dirk Koch, Thilo Streichert, Christian Haubelt and Jürgen Teich:
    Logic Chip, Logic System and Method for Designing a Logic Chip
    Patent PCT/EP2008/007342, filed 8.9.2008.
    Bibtex
     
  • Dirk Koch, Thilo Streichert, Christian Haubelt and Jürgen Teich:
    Logic Chip, Method and Computer Program for Providing a Configuration Information for a Configurable Logic Chip
    Patent PCT/EP2008/007343, filed 8.9.2008.
    Bibtex
     
  • Dirk Koch, Christian Beckhoff and Jürgen Teich:
    ReCoBus-Builder – a Novel Tool and Technique to Build Statically and Dynamically Reconfigurable Systems for FPGAs
    In Proceedings of International Conference on Field-Programmable Logic and Applications (FPL 08), pp. 119-124, Heidelberg, Germany, 2008.
    Paper ©¹     Bibtex & Abstract
  • Sandor Fekete, Jan van der Veen,  Dirk Koch, Josef Angermaier and Jürgen Teich:
    No-Break Dynamic Defragmentation of Reconfigurable Devices
    In Proceedings of International Conference on Field-Programmable Logic and Applications (FPL 08), pp. 113-118, Heidelberg, Germany, 2008.
    Paper ©¹     Bibtex & Abstract
     
  • Dirk Koch, Christian Haubelt and Jürgen Teich:
    Efficient Reconfigurable On-Chip Buses for FPGAs
    In Proceedings of the 16th annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2008), pp. 287-290, Palo Alto, California, April 14-15, 2008.
    Extendet Paper ©¹     Bibtex & Abstract

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2007


 

  • Dirk Koch, Christian Beckhoff and Jürgen Teich:
    Bitstream Decompression for High Speed FPGA Configuration from Slow Memories
    In Proceedings of the IEEE International Conference on Field-Programmable Technology 2007 (ICFPT'07), pp. 161-168
    Paper ©¹     Bibtex & Abstract
     
  • Jim Torresen and Kyrre Glette:
    Improving Flexibility in On-line Evolvable Systems by Reconfigurable Computing. In proc. of 7th International Conference on Evolvable Systems (ICES07), Springer LNCS 4684, pp. 391 - 402, Wuhan, China, ISSN 0302-9743, Wuhan, China. 
     Paper 
     
  • Dirk Koch, Thilo Streichert, Christian Haubelt and Jürgen Teich:
    Efficient Reconfigurable On-Chip Buses
    Patent EP07017975, filed 13.09.2007.
    Bibtex
     
  • Dirk Koch, Christian Haubelt, Thilo Streichert and Jürgen Teich:
    Modeling and Synthesis of Hardware-Software Morphing
    In Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), pp. 2746-2749, New Orleans, LA, U.S.A., May 2007
    Paper ©¹     Bibtex & Abstract
     
  • Dirk Koch, Christian Haubelt and Jürgen Teich:
    Efficient Hardware Checkpointing -- Concepts, Overhead Analysis, and Implementation
    In Proceedings of the 15th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2007), Monterey, CA, pp. 188-196, February 18-20, 2007.
    Paper ©²     Demo video     Bibtex & Abstract

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till 2006


 

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Published Feb. 26, 2010 10:38 AM - Last modified Nov. 28, 2014 10:57 AM