Nettsider med emneord «ASIC»

This project wants to explore possibilities to read out pixel data of a CMOS image sensor (CIS) non-destructively (i.e. without emptying the pixel of its photo charge) while the exposure is still ongoing. This will allow adaptive exposure time (or the adjustment of other exposure parameters) 'on the fly' leading to better quality images, without having to retake the image multiple times and thus wasting precious time in high speed applications.

This project shall look into implementing an analog neural network integrated circuit using Flash memory for programable analog synaptic weights.

In this project we shall look into implementing a 'Silicon Cochlea', an analog integrated circuit inspired by the inner ear to decompose an audio signal into its frequency components.

Through the EU-funded 3D-MUSE project, we can design in one of the most advanced CMOS technologies available. We also get a taste of technologies that will not be widely available until a few years from now. Within this project, the ASIC design company Ideas together with IFI want to offer a master project where some key elements for a sensor system shall be designed.

Are you interested in radiation measurements? Do you want to get experience with advanced electronic technologies and devices? IDEAS (Integrated Detector Electronics AS, www.ideas.no) is a small company in Oslo developing integrated circuits for radiation detection. The main application areas for our circuits and systems are health, space and research.

CMOS image sensors (CIS) are widely adopted in many application fields, such as industry control system, automotive, consumer electronics, surveillance system, and so on. Inside of a CIS, a column-ADC based readout architecture is commonly employed because of its high-speed and low-noise readout capability. To improve readout speed and noise performance of column-parallel readout architecture, a compact and efficient column ADC structure is desired. A VCO-based voltage-to-frequency or voltage-to-digital converter is a promising candidate for real column level ADC that could be contained completely inside of column array.

Having an accurate and reliable model for electron generators is important when it comes to design of blocks dealing with elements such as photodiodes (PD) or ISFETs. Common way to simulate/analyse this type of blocks is to replace the photo diode with a current source. This may result in some unrealistic voltage developments on sensitive nodes or leakages not expected. Recent advances in photo-sensors field brings the need for an appropriate PD model under the spotlight.

CMOS image sensors (CIS) are widely adopted in various applications for example mobile and automotive cameras. As the application expanding their functionality to motion sensing and autonomous driving, the applications keep demanding for higher resolution and faster operating CIS while maintaining the power budget. Therefore, implementing CIS with low-noise and low-power analogue front end (AFE) is essential. Moreover, in an advanced process, conventional analogue design approaches have many challenges such as lower intrinsic gain of devices, and smaller headroom for operation. Therefore, a new structure is highly required to meet the requirements and to solve the challenges. A current-reusing architecture, as the name self-explained, utilizes the supply current to generate transconductance of both PMOS and NMOS. Therefore, the structure could improve gain, bandwidth, and noise characteristics comparing to the conventional analogue stages. For this reason, architecture is a suitable candidate for the solution.