Dag Trygve Eckhoff Wisland

• Amble, Magnus; Aunet, Snorre; Wisland, Dag Trygve Eckhoff & Kjelgård, Kristian Gjertsen (2023). Randomized Bulk-Voltages: A Countermeasure to Mask Side-Channel Leakage of CMOS Logic Gates. In Setti, Gianluca & Manganaro, M. (Ed.), Proceedings,2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE (Institute of Electrical and Electronics Engineers). ISSN 979-8-3503-0210-3. p. 708–712. doi: 10.1109/MWSCAS57524.2023.10406067.
• Recha, Adrian Miguel Llop; Wisland, Dag Trygve Eckhoff; Lande, Tor Sverre; Kjelgård, Kristian Gjertsen & Cauwenberghs, Gert (2023). Wideband Proximity Coupling Sensor for Wrist Heart Rate Monitoring. In Chen, Jie (Eds.), 2023 IEEE Biomedical Circuits and Systems Conference (BioCAS). IEEE conference proceedings. ISSN 979-8-3503-0026-0. doi: 10.1109/BioCAS58349.2023.10388551.
• Recha, Adrian Miguel Llop; Wisland, Dag Trygve Eckhoff; Lande, Tor Sverre & Kjelgård, Kristian Gjertsen (2023). Enhancing Measurement Specificity in Biological Samples with Differential Probing Analysis. In Soh, Ping Jack (Eds.), 2023 IEEE MTT-S International Microwave Biomedical Conference (IMBioC) Proceedings. IEEE conference proceedings. ISSN 978-1-6654-9217-1. p. 370–384. doi: 10.1109/IMBioC56839.2023.10304877.
• Llop Recha, Adrian Miguel; Wisland, Dag Trygve Eckhoff; Lande, Tor Sverre & Kjelgård, Kristian Gjertsen (2022). Differential Analysis in Microwave Dielectric Probing for Transcutaneous Biomedical Sensing, 2021 51st European Microwave Conference (EuMC). IEEE conference proceedings. ISSN 978-2-87487-062-0. p. 845–848. doi: 10.23919/EuMC50147.2022.9784189.
• Kjelgård, Kristian Gjertsen; Wisland, Dag T & Lande, Tor Sverre (2018). 3D Printed Wideband Microwave Absorbers using Composite Graphite/PLA Filament . In Almudena Suárez, Rodríguez (Eds.), 2018 48th European Microwave Conference (EuMC). IEEE conference proceedings. ISSN 978-2-87487-051-4. p. 859–862. doi: 10.23919/EuMC.2018.8541699.
• Andersen, Nikolaj; Granhaug, Kristian; Michaelsen, Jørgen Andreas; Bagga, Sumit; Hjortland, Håkon André & Knutsen, Mats Risopatron [Show all 8 contributors for this article] (2017). A 118-mW Pulse-Based Radar SoC in 55-nm CMOS for Non-Contact Human Vital Signs Detection. IEEE Journal of Solid-State Circuits. ISSN 0018-9200. 52(12), p. 3421–3433. doi: 10.1109/JSSC.2017.2764051.
• Andersen, Nikolaj; Granhaug, Kristian; Michaelsen, Jørgen Andreas; Bagga, Sumit; Hjortland, Håkon André & Knutsen, Mats Risopatron [Show all 8 contributors for this article] (2017). A 118mW 23.3GS/s dual-band 7.3GHz and 8.7GHz impulse-based direct RF sampling radar SoC in 55nm CMOS. Digest of technical papers - IEEE International Solid-State Circuits Conference. ISSN 0193-6530. 60, p. 138–140. doi: 10.1109/ISSCC.2017.7870299.
• Moradi, Farshad; Panagopoulos, Georgios; Karakonstantis, Georgios; Farkhani, Hooman; Wisland, Dag Trygve Eckhoff & Madsen, Jens K. [Show all 8 contributors for this article] (2014). Multi-level wordline driver for robust SRAM design in nano-scale CMOS technology. Microelectronics Journal. ISSN 0959-8324. 45(1), p. 23–34. doi: 10.1016/j.mejo.2013.09.009.
• Michaelsen, Jørgen Andreas & Wisland, Dag T (2013). A VCO linearization system for ADC applications. In Loumeau, Patrick & Sawan, Mohamad (Ed.), Proceedings of the 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS). IEEE conference proceedings. ISSN 9781479906192. doi: 10.1109/NEWCAS.2013.6573623.
• Michaelsen, Jørgen Andreas & Wisland, Dag T (2013). Noise and linearity analysis of a frequency to voltage converter. In Sekanina, Lukas; Fey, Görschwin; Raik, Jaan; Aunet, Snorre & Růžička, Richard (Ed.), Proceedings of the 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). IEEE (Institute of Electrical and Electronics Engineers). ISSN 978-1-4673-6133-0. p. 228–231. doi: 10.1109/DDECS.2013.6549822.
• Moradi, Farshad; Cao, Tuan Vu; Vatajelu, Elena I.; Peiravi, Ali; Mahmoodi, Hamid & Wisland, Dag T (2013). Domino logic designs for high-performance and leakage-tolerant applications. Integration. ISSN 0167-9260. 46(3), p. 247–254. doi: 10.1016/j.vlsi.2012.04.005.
• Wisland, Dag T; Støa, Stig; Andersen, Nikolaj; Granhaug, Kristian; Lande, Tor Sverre & Hjortland, Håkon André (2012). CMOS nanoscale impulse radar utilized in 2-dimensional ISAR imaging system. In Dale Blair, William & Bruder, Joseph (Ed.), 2012 IEEE RADAR CONFERENCE. IEEE conference proceedings. ISSN 978-1-4673-0656-0. p. 714–719. doi: 10.1109/radar.2012.6212231.
• Cao, Tuan-Vu; Wisland, Dag T & Lande, Tor Sverre (2012). High resolution Frequency-based Delta-Sigma Modulator utilizing multi-phase quantizer. In Sunwoo, Myung Hoon & Kang, Sung-Mo (Ed.), Circuits and Systems (ISCAS), 2012 IEEE International Symposium on. IEEE conference proceedings. ISSN 978-1-4673-0218-0. p. 3009–3012. doi: 10.1109/iscas.2012.6271951.
• Cao, Tuan-Vu; Maier, Christoph; Wisland, Dag T; Lande, Tor Sverre & Cauwenbergh, Gert (2012). BFSK Mics Direct-DCO Transmitter with Adaptive Background Frequency Regulation. In Deval, Yann; Begueret, Jean-Baptiste & Belot, Didier (Ed.), ESSCIRC (ESSCIRC), 2012 Proceedings of the. IEEE conference proceedings. ISSN 978-1-4673-2212-6. p. 305–308. doi: 10.1109/esscirc.2012.6341315.
• Cao, Tuan Vu; Wisland, Dag T; Lande, Tor Sverre & Moradi, Farshad (2012). Low phase-noise VCO utilizing modified symmetric load and partial positive feedback for FDSM. Analog Integrated Circuits and Signal Processing. ISSN 0925-1030. 73(1), p. 151–160. doi: 10.1007/s10470-011-9803-6.
• Moradi, Farshad; Gupta, Sumeet Kumar; Panagopoulos, Georgios; Wisland, Dag T; Mahmoodi, Hamid & Roy, Kaushik (2011). Asymmetrically Doped FinFETs for Low-Power Robust SRAMs. IEEE Transactions on Electron Devices. ISSN 0018-9383. 58(12), p. 4241–4249. doi: 10.1109/TED.2011.2169678.
• Meier, C; Cao, Tuan Vu; Wisland, Dag T; Lande, Tor Sverre & Cauwenberghs, G. (2011). Energy-Efficient Resonant BFSK MICS Transmitter with Fast-Settling Dual-Loop Adaptive Frequency Locking. In Lubaszewski, Marcelo & IEEE, ISCAS (Ed.), Proc. 2011 IEEE International Symposium on Circuits and Systems. IEEE conference proceedings. ISSN 978-1-4244-9472-9. p. 2601–2604. doi: 10.1109/iscas.2011.5938137.
• Moradi, Farshad; Cao, Tuan Vu; Wisland, Dag T; Aunet, Snorre & Mahmoodi, Hamid (2011). Optimal Body Biasing for Maximizing Circuit Performance in 65nm CMOS Technology. The Midwest Symposium on Circuits and Systems conference proceedings. ISSN 1548-3746. doi: 10.1109/mwscas.2011.6026651.
• Maier, C.; Cao, Tuan Vu; Wisland, Dag T; Lande, Tor Sverre & Cauwenberghs, G. (2011). Fast-settling multiple-loop adaptive frequency locking scheme for energy-efficient resonant FSK transmitter. Electronics Letters. ISSN 0013-5194. 47(14), p. 794–U78. doi: 10.1049/el.2011.1448.
• Michaelsen, Jørgen Andreas; Ramstad, Jan Erik; Wisland, Dag T & Søråsen, Oddvar (2011). Low-power Sensor Interfacing and MEMS for Wireless Sensor Networks. In Tarannum, Suraiya (Eds.), Wireless Sensor Networks. IntechOpen. ISSN 978-953-307-325-5.
• Moradi, Farshad; Wisland, Dag T; Berg, Yngvar; Aunet, Snorre & Cao, Tuan Vu (2010). Process Variations in Sub-Threshold SRAM Cells in 65nm CMOS. Proceedings of the IEEE International Conference on Microelectronic Test Structures. ISSN 1071-9032. p. 371–374.
• Cao, Tuan Vu; Wisland, Dag T; Lande, Tor Sverre & Moradi, Farshad (2010). Rail-to-Rail Low-Power Fully Differential OTA Utilizing Adaptive Biasing and Partial Feedback. IEEE International Symposium on Circuits and Systems proceedings. ISSN 0271-4302. p. 2820–2823.
• Moradi, Farshad; Wisland, Dag T; Mahmoodi, Hamid; Berg, Yngvar & Cao, Tuan Vu (2010). New SRAM Design Using Body Bias Technique for Ultra Low Power Applications. In Gadepally, Kamesh (Eds.), Proceedings of the Eleventh International Symposium on Quality of Electronic Design (ISQED 2010). IEEE conference proceedings. ISSN 978-1-4244-6454-8.
• Moradi, Farshad; Augustin, Charles; Goel, Ashish; Karakonstantis, Georgios; Cao, Tuan Vu & Wisland, Dag T [Show all 8 contributors for this article] (2010). Data-Dependant Sense-Amplifier Flip-Flop for Low Power Applications. Proceedings of the IEEE Custom Integrated Circuits Conference. ISSN 0886-5930.
• Michaelsen, Jørgen Andreas & Wisland, Dag T (2010). A Low-Voltage Low-Power Frequency-to-Voltage Converter for VCO Feedback Linearization. In Stouraitis, Thanos; Macii, Enrico & Paliouras, Vassilis (Ed.), 2010 IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2010). IEEE conference proceedings. ISSN 978-1-4244-8156-9. p. 1139–1142.
• Michaelsen, Jørgen Andreas & Wisland, Dag T (2010). Digital PVT Calibration of a Frequency-to-Voltage Converter. In Nurmi, Jari & Halonen, Kari (Ed.), Norchip 2010, 28th Norchip Conference. IEEE conference proceedings. ISSN 978-1-4244-8973-2.
• Cao, Tuan Vu; Wisland, Dag T; Lande, Tor Sverre & Moradi, Farshad (2010). Rail-to-rail low-power fully differential OTA utilizing adaptive biasing and partial feedback. In Serdijn, Wouter A. (Eds.), Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on. IEEE conference proceedings. ISSN 978-1-4244-5308-5. p. 2820–2823.
• Liseth, Olav Evensen; Mo, Daniel; Hjortland, Håkon André; Lande, Tor Sverre & Wisland, Dag T (2010). Power-Efficient Cross-Correlation Beat Detection in Electrocardiogram Analysis Using Bitstreams. IEEE Transactions on Biomedical Circuits and Systems. ISSN 1932-4545. 4(6), p. 419–425. doi: 10.1109/TBCAS.2010.2079933.
• Moradi, Farshad; Wisland, Dag T; Berg, Yngvar; Aunet, Snorre & Cao, Tuan Vu (2010). Process Variations in Sub-Threshold SRAM Cells in 65nm CMOS. In Alioto, Massimo (Eds.), Proceedings of the 22nd International Conference on Microelectronics. IEEE conference proceedings. ISSN 978-1-4244-8156-9.
• Moradi, Farshad; Wisland, Dag T; Mahmoodi, Hamid; Peiravi, Ali; Aunet, Snorre & Cao, Tuan Vu (2009). New subthreshold concepts in 65nm CMOS technology. In Immaneni, Lalitha (Eds.), Proceedings of the 10th IEEE International Symposium on Quality Electronic Design. IEEE conference proceedings. ISSN 978-1-4244-2952-3. p. 162–166.
• Moradi, Farshad; Wisland, Dag T; Mahmoodi, Hamid; Aunet, Snorre; Cao, Tuan Vu & Peiravi, Ali (2009). Ultra Low Power Full Adder Topologies. In Nowrouzian, Behrouz (Eds.), Proceedings of the 2009 International Symposium on Circuits and Systems. IEEE conference proceedings. ISSN 978-1-4244-3827-3. p. 3158–3161.
• Cao, Tuan Vu; Wisland, Dag T; Lande, Tor Sverre & Moradi, Farshad (2009). Low-Power, Enhanced-Gain Adaptive-Biasing based Operational Transconductance Amplifiers. In Ytterdal, Trond & Aunet, Snorre (Ed.), Proceedings of the 27th Norchip Conference, Trondheim, 16.-17. November, 2009. IEEE conference proceedings. ISSN 978-1-4244-4311-6.
• Cao, Tuan Vu; Wisland, Dag T; Moradi, Farshad & Lande, Tor Sverre (2009). Novel Low Voltage Current-Mirror Sense Amplifier Based Flip-Flop with Reduced Delay Time. In Nowrouzian, Behrouz (Eds.), Proceedings of the 2009 International Symposium on Circuits and Systems. IEEE conference proceedings. ISSN 978-1-4244-3827-3. p. 3166–3169.
• Cao, Tuan Vu; Wisland, Dag T; Lande, Tor Sverre & Moradi, Farshad (2009). Low Phase-Noise and Wide Tuning-Range CMOS Differential VCO for Sigma-Delta Frequency Modulator, 2009 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE (Institute of Electrical and Electronics Engineers). ISSN 9781424444083. p. 13–18.
• Cao, Tuan Vu; Wisland, Dag T; Lande, Tor Sverre & Moradi, Farshad (2009). A Design of Bulk-Controlled Ring-VCO with 1/f-Noise Reduction for Frequency delta-sigma Modulator. In Napieralski, Andrzej (Eds.), Mixed Design of Integrated Circuits and Systems. IEEE conference proceedings. ISSN 978-83-928756-0-4. p. 187–192.
• Cao, Tuan Vu; Wisland, Dag T; Lande, Tor Sverre & Moradi, Farshad (2009). Low Phase-Noise VCO Utilizing NMOS Symmetric Load for Frequency-Based Delta-Sigma Modulators. In Hamoui, Anas & Malcovati, Piero (Ed.), The 16th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2009). IEEE conference proceedings. ISSN 978-1-4244-5091-6. p. 767–770.
• Moradi, Farshad; Wisland, Dag T; Mahmoodi, Hamid; Cao, Tuan Vu & Dooghabadi, Malihe Zarre (2009). Adaptive Supply Voltage Circuit Using Body Bias Technique. In Napieralski, Andrzej (Eds.), Mixed Design of Integrated Circuits and Systems. IEEE conference proceedings. ISSN 978-83-928756-0-4. p. 215–219.
• Liseth, Olav Evensen; Mo, Daniel; Hjortland, Håkon André; Lande, Tor Sverre & Wisland, Dag T (2009). Power Efficient Cross-Correlation Using Bitstreams. In Ytterdal, Trond & Aunet, Snorre (Ed.), Proceedings of the 27th Norchip Conference, Trondheim, 16.-17. November, 2009. IEEE conference proceedings. ISSN 978-1-4244-4311-6.
• Dahl, Øyvind; Hjortland, Håkon André; Lande, Tor Sverre & Wisland, Dag T (2009). Close range impulse radio beamformers. In Beaulieu, Norman & Milstein, Laurence (Ed.), Ultra-Wideband, 2009. ICUWB 2009. IEEE International Conference on. IEEE conference proceedings. ISSN 978-1-4244-2930-1. p. 205–209.
• Peiravi, Ali; Moradi, Farshad & Wisland, Dag T (2009). Leakage Tolerant, Noise Immune domino logic for circuit design in the ultra deep sub-micron CMOS technology for haigh fan-in gates. Journal of Applied Sciences. ISSN 1812-5654. 9(2), p. 392–396. doi: 10.3923/jas.2009.392.396. Full text in Research Archive
• Moradi, Farshad; Wisland, Dag T; Mahmoodi, Hamid & Cao, Tuan Vu (2008). High speed and leakage-tolerant domino circuits for high fan-in applications in 70nm CMOS technology. In Murphy, Roberto (Eds.), 7th IEEE International Caribbean Conference on Devices, Circuits and Systems, 2008. ICCDCS 2008. IEEE conference proceedings. ISSN 978-1-4244-1956-2. p. 1–5.
• Moradi, Farshad; Wisland, Dag T; Aunet, Snorre; Mahmoodi, Hamid & Cao, Tuan Vu (2008). 65nm Sub-Threshold 11t-SRAM for Ultra Low Voltage Applications. In Buckner, Thomas & Marshall, Andrew (Ed.), Proccedings, IEEE SOC Conference. IEEE conference proceedings. ISSN 978-1-4244-2596-9.
• Michaelsen, Jørgen Andreas & Wisland, Dag T (2008). Towards a Second Order FDSM Analog-to-Digital Converter for Wireless Sensor Network Nodes. In Ellervee, Peeter & Jervan, Gert (Ed.), Proceedings of 26th IEEE Norchip Conference. IEEE conference proceedings. ISSN 978-1-4244-2493-1.
• Moradi, Farshad; Wisland, Dag T; Cao, Tuan Vu; Peiravi, Ali & Mahmoodi, Hamid (2008). 1-Bit Sub Threshold Full Adder in 65nm CMOS Technology. In Elwakil, A. & Anis, M. (Ed.), Proceedings of 20th International Conference on Microelectronics. IEEE conference proceedings.
• Cao, Tuan Vu; Wisland, Dag T; Lande, Tor Sverre & Moradi, Farshad (2008). Low-Voltage, Low-Power, and Wide-Tuning-Range Ring-VCO for Frequency ΔΣ Modulator. In Ellervee, Peeter & Jervan, Gert (Ed.), Proceedings of 26th IEEE Norchip Conference. IEEE conference proceedings. ISSN 978-1-4244-2493-1.
• Cao, Tuan Vu; Wisland, Dag T; Lande, Tor Sverre; Moradi, Farshad & Hee Kim, Young (2008). Novel Start-up Circuit with Enhanced Power-up Characteristic for Bandgap References. In Buckner, Thomas & Marshall, Andrew (Ed.), Proccedings, IEEE SOC Conference. IEEE conference proceedings. ISSN 978-1-4244-2596-9.
• Hjortland, Håkon André; Wisland, Dag T; Lande, Tor Sverre; Limbodal, Claus & Meisal, Kjetil (2007). Thresholded samplers for UWB impulse radar. In Ling, Nam & Setti, Gianluca (Ed.), Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on. IEEE conference proceedings. ISSN 1-4244-0921-7. p. 1210–1213.
• Michaelsen, Jørgen Andreas & Wisland, Dag T (2007). Suppression of delta-sigma DAC quantisation noise by bandwidth adaptation. In Petraglia, Antonio (Eds.), SBCCI '07: Proceedings of the 20th annual conference on Integrated circuits and systems design. ACM Publications. ISSN 978-1-59593-816-9. p. 16–20.
• Wismar, Ulrik & Wisland, Dag T (2007). A 0.2V, 7.5 μW, 20 kHz ΣΔ modulator with 69 dB SNR in 90 nm CMOS. European Conference on Solid-State Circuits (ESSCIRC). ISSN 1930-8833. p. 206–209.
• Hjortland, Håkon Andre; Wisland, Dag T; Limbodal, Claus; Meisal, Kjetil & Lande, Tor Sverre (2006). CMOS Impulse Radar. In Johansson, Thomas (Eds.), Proceedings 24th Norchip Conference. IEEE conference proceedings. ISSN 1-4244-0772-9. p. 75–79.
• Wismar, Ulrik; Wisland, Dag T & Andreani, Pietro (2006). A 0.2V 0.44uW Audio Analog to Digital Delta Sigma Modulator with 57 fJ/conversion FoM. European Conference on Solid-State Circuits (ESSCIRC). ISSN 1930-8833.
• Limbodal, Claus; Meisal, Kjetil; Lande, Tor Sverre & Wisland, Dag T (2005). A Spatial RAKE-Receiver for Real-Time UWB-IR Applications. In Wittneben, Armin (Eds.), ICU 2005 - IEEE International Conference on Ultra-Wideband Proceedings. IEEE Press. ISSN 0-7803-9398-8. p. 65 –69.
• Meisal, Kjetil; Limbodal, Claus; Lande, Tor Sverre & Wisland, Dag T (2005). CMOS Impulse Radio Receiver Front-end. In Rahkonen, Timo (Eds.), Proceedings 2005 NORCHIP conference. IEEE Press. ISSN 1-4244-0064-3.
• Wismar, Ulrik; Wisland, Dag T & Andreani, Pietro (2005). Linearity of Bulk-Controlled Inverter Ring VCO in Weak and Strong Inversion. In Rahkonen, Timo (Eds.), Proceedings 2005 NORCHIP conference. IEEE Press. ISSN 1-4244-0064-3. p. 145–148.
• Øysted, Karianne & Wisland, Dag T (2005). Piezoresistive CMOS-MEMS Pressure Sensor with Ring Oscillator Readout Including Delta-Sigma Analog-to-Digital Converter On-chip. In Wissel, Larry (Eds.), Proceedings of IEEE Custom Integrated Circuits Conference 2005. IEEE Press. ISSN 0-7803-9024-5. p. 511–514.
• Wisland, Dag T; Høvin, Mats Erling & Lande, Tor Sverre (2004). A non-feedback Delta-Sigma modulator for digital-to-analog conversion using digital frequency modulation. Analog Integrated Circuits and Signal Processing. ISSN 0925-1030. 41(2-3), p. 209–222.
• Høvin, Mats Erling; Wisland, Dag T; Berg, Yngvar & Lande, Tor Sverre (2003). A frequency delta-sigma analog-to-digital converter operating at a power-supply voltage og 0.6 V. Analog Integrated Circuits and Signal Processing. ISSN 0925-1030.
• Høvin, Mats Erling; Wisland, Dag T; Marienborg, Jan Tore; Lande, Tor Sverre & Berg, Yngvar (2001). Pattern Noise in the Frequency Delta-Sigma Modulator. Analog Integrated Circuits and Signal Processing. ISSN 0925-1030. 26(1), p. 75–82. Show summary

  In this paper we show that the first-order freque ncy delta-sigma modulator is equivalent to a traditional delta-sigma modulator with respect to pattern noise. We further propose two techniques for reducing the effect of pattern noise. The first technique is based on time-domain dithering which is implemented by adding white phase noise to the FM signal. The second technique is based on locating the narrow dynamic range that may be in this kind of modulators, in a pattern noise valley. This technique can utilize pattern noise to make the modulator provide significantly higher digital resolution than the white noise quantization model predicts. Finally the theory is verified by measurements.

View all works in Cristin

• Nurmi, Jari; Wisland, Dag Trygve Eckhoff; Aunet, Snorre & Kjelgård, Kristian Gjertsen (2022). Proceedings, 2022 IEEE Norcas Conference. IEEE conference proceedings. ISBN 979-8-3503-4550-6. 200 p.
• Nurmi, Jari; Wisland, Dag Trygve Eckhoff; Aunet, Snorre & Kjelgård, Kristian Gjertsen (2021). Proceedings, 2021 IEEE Nordic Circuits and Systems Conference (NORCAS). IEEE (Institute of Electrical and Electronics Engineers). ISBN 978-1-6654-0712-0. 220 p.
• Nurmi, Jari; Wisland, Dag T; Aunet, Snorre & Kjelgård, Kristian Gjertsen (2020). Proceedings, Sixth IEEE Nordic Circuits and Systems Conference (NorCAS 2020). . IEEE conference proceedings. ISBN 978-1-7281-9226-0. 205 p. Show summary

  On behalf of the Organizing Committee, we would like to welcome all of you to the Sixth IEEE Nordic Circuits and Systems Conference (NorCAS 2020). The conference is a merge of the well-established conferences NORCHIP and the International Symposium on System-on-Chip (SoC). We have a high-quality program with keynotes and papers to be presented. Research covering a wide range of topics within circuits and systems in the digital, analog and mixed domains will be presented. From in total 58 papers submitted, 29 papers were selected for oral presentation in the virtual conference, yielding exactly 50% acceptance rate. There will be four invited speakers who will share their view on emerging key technologies in the circuits and systems field. In the opening session Prof. An-Yeu (Andy) Wu from National Taiwan University will discuss compressive sensing and compressive analytics. Later in the afternoon Prof. Alberto Bosio from ICL, France, will give insights to approximate computing and, in particular, testing of it. In the second morning, Prof. Tim Constandinou from University College London, UK, will present his talk on “Future Human: Merging Minds and Machines.“ The final talk is given by Prof. Alexander Wyglinsky from Worchester Polytechnic Institute, USA, introducing an educational view to Software-Defined Radio. We would like to forward great thanks to IEEE Circuits and Systems Society (CAS) for financial co-sponsoring of the conference. Thanks also to Tampere University and University of Oslo for the efforts on the congress office and virtual platform. We are also thankful to all the Program Committee members and reviewers who have put time and effort into reviewing the submitted papers. Moreover, we are grateful to the NorCAS steering committee for helpful advice and their contribution in the paper selection process. We hope that you will enjoy your time in the virtual conference. We wish you an inspiring conference where your knowledge is increased and friendships are both established and strengthened.

• Moradi Khanshan, Tohid; Kjelgård, Kristian Gjertsen; Ulvestad, Emil; Wisland, Dag T & Lande, Tor Sverre (2018). CMOS photosensors for LIDAR. IEEE conference proceedings. ISBN 978-1-5386-7656-1. 4 p.
• Ulvestad, Emil; Kjelgård, Kristian Gjertsen; Moradi Khanshan, Tohid; Wisland, Dag T & Lande, Tor Sverre (2018). High-speed Sampling System in CMOS. IEEE conference proceedings. ISBN 978-1-5386-7656-1. 4 p.

View all works in Cristin

• Amble, Magnus; Aunet, Snorre; Wisland, Dag Trygve Eckhoff & Kjelgård, Kristian Gjertsen (2023). Randomized Bulk-Voltages: A Countermeasure to Mask Side-Channel Leakage of CMOS Logic Gates.
• Hogganvik, Pål Gunnar & Wisland, Dag Trygve Eckhoff (2023). A 2 GHz bandwidth, 6-bit inverter-based open-loop amplifier for high-speed ADCs.
• Kjelgård, Kristian Gjertsen; Nurmi, Jari & Wisland, Dag Trygve Eckhoff (2021). Welcome to NORCAS 2021. IEEE Xplore Digital Library. doi: 10.1109/NorCAS53631.2021.9599644.
• Nurmi, Jari & Wisland, Dag Trygve Eckhoff (2020). Welcome to NORCAS 2020. 2020 IEEE Nordic Circuits and Systems Conference (NorCAS). doi: 10.1109/NorCAS51424.2020.9265140.
• Sjöman, Heikki; Soares, Nazare; Suijkerbuijk, Martinus; Blindheim, Jørgen; Steinert, Martin & Wisland, Dag T (2018). The breathing room - breathing interval and heart rate capturing through ultra low power radar. In Perry, Mark & Cox, Anna (Ed.), Extended Abstracts of the 2018 CHI Conference on Human Factors in Computing Systems. ACM Publications. ISSN 978-1-4503-5621-3. doi: 10.1145/3170427.3186473.
• Tang, Kea-Tiong & Wisland, Dag T (2014). Guest editorial-ISCAS 2013 special issue. IEEE Transactions on Biomedical Circuits and Systems. ISSN 1932-4545. 8(2), p. 153–154. doi: 10.1109/TBCAS.2014.2323855.
• Cao, Tuan Vu; Maier, C.; Wisland, Dag T; Lande, Tor Sverre & Cauwenberghs, G. (2011). Live Demonstration: Energy-Efficient Resonant BFSK MICS Transmitter.
• Cao, Tuan Vu; Wisland, Dag T; Lande, Tor Sverre & Moradi, Farshad (2010). Multi-phase Counting First-Order Frequency-based Delta-Sigma Modulators.
• Moradi, Farshad; Wisland, Dag T; Mahmoodi, Hamid & Cao, Tuan Vu (2009). Improved Write Margin 6T-SRAM for Low Power Applications.
• Moradi, Farshad; Wisland, Dag T; Mahmoodi, Hamid; Peiravi, Ali; Aunet, Snorre & Cao, Tuan Vu (2009). New Subthreshold Concepts in 65nm CMOS Technology.
• Moradi, Farshad; Wisland, Dag T; Mahmoodi, Hamid; Aunet, Snorre; Peiravi, Ali & Cao, Tuan Vu (2009). Ultra Low Power Full Adder Topologies.
• Wisland, Dag T; Aunet, Snorre & Lande, Tor Sverre (2006). Mikroelektronikk for Wireless Sensor Networks.
• Høvin, Mats Erling; Holgersen, Ragnhild & Wisland, Dag T (2005). Cyberhånda underveis. IMPULS_05, Dataforeningen 2005. p. 56–57.
• Høvin, Mats Erling; Holgersen, Ragnhild & Wisland, Dag T (2005). Kunstig hånd styres av hjernen. [Newspaper]. Verdens Gang (VG).
• Limbodal, Claus; Meisal, Kjetil; Lande, Tor Sverre & Wisland, Dag T (2005). A Spatial RAKE-Receiver for Real-Time UWB-IR Applications.
• Øysted, Karianne & Wisland, Dag T (2005). Piezoresistive CMOS-MEMS Pressure Sensor with Ring Oscillator Readout Including Delta-Sigma Analog-to-Digital Converter On-chip.
• Høvin, Mats Erling; Wisland, Dag T & Søråsen, Oddvar (2004). Hjernen styrer håndprotese. [Newspaper]. Aftenposten.
• Høvin, Mats Erling; Wisland, Dag T & Søråsen, Oddvar (2004). Kunstig hånd styres av hjernen. [Newspaper]. Apollon.
• Høvin, Mats Erling; Wisland, Dag T & Søråsen, Oddvar (2004). Kunstig hånd styres av hjernen. [Newspaper]. ComputerWorld.
• Høvin, Mats Erling; Wisland, Dag T & Søråsen, Oddvar (2004). Hjernens impulser skal styre protese. [Internet]. Nettavisen TV2.
• Høvin, Mats Erling; Wisland, Dag T & Søråsen, Oddvar (2004). Kunstig hand skal styrast av hjernen. [Internet]. Magasinett.no.
• Lande, Tor Sverre; Wisland, Dag T; Meisal, Kjetil & Limbodal, Claus (2004). CMOS UWB receivers.
• Wisland, Dag T & Øysted, Karianne (2004). A Fully Integrated CMOS-MEMS Pressure Sensor with On-chip Delta-Sigma Analog-to-Digital Converter.
• Wisland, Dag T & Øysted, Karianne (2004). A Fully Integrated CMOS-MEMS Microphone with On-chip Delta-Sigma Analog-to-Digital Converter.
• Wisland, Dag T; Høvin, Mats Erling & Lande, Tor Sverre (2003). Quantization noise in the first-order non-feedback delta-sigma modulator with DC-input.
• Høvin, Mats Erling; Wisland, Dag T; Marienborg, Jan Tore & Lande, Tor Sverre (2002). Delta-sigma modulation in single neurons. Show summary

  In this paper we investigate the relationship between the pulse-coded signal representation found in biological neurons and signals represented by first-order delta-sigma bit-streams. We show that a first-order delta-sigma bit-stream is a digital equivalent to a pulse-coded neural signal. By increasing the clock frequency, a delta-sigma bit-stream can approach a pulse-coded representation with arbitrary accuracy.

• Høvin, Mats Erling; Wisland, Dag T; Berg, Yngvar & Lande, Tor Sverre (2002). A LOW-VOLTAGE SINC2 DECIMATOR IMPLEMENTED BY A NEW CIRCUIT TECHNIQUE USING FLOATING-GATE MOS TRANSISTORS. Show summary

  In this paper we present a new circuit technique making standard CMOS digital circuits able to operate at a power supply voltages below 1 V. This technique is based on lowering the effective transistor threshold voltages by the use of floating-gates, where all the floating gate voltages on the chip are simultaneously programmed by the use of ultra-violet light. A sinc/sup 2/ decimator is implemented in an AMS 0.6 mu m process by this technique.

• Wisland, Dag T; Høvin, Mats Erling & Lande, Tor Sverre (2002). A Novel Multi-Bit Parallel Delta-Sigma FM-to-Digital Converter with 24-bit Resolution. Show summary

  This paper describes a multi-bit Delta-Sigma FM-to-digital converter (FDC) combining 1024 first-order Delta-Sigma modulators in parallel to increase the signal to quantization-noise ratio (SQNR). This parallelization technique is totally new and according to theory, the SQNR is increased by 6 dB per doubling of number of modulators. The proposed circuit is an extension of the existing frequency delta sigma modulator (FDSM)-concept. The FDSM-concept is based on a Delta-Sigma modulator with no global feedback and thus no need for a feedback DAC, which makes multi-bit conversion straight forward. Theoretical discussions and circuit simulation are presented along with measured results from a 24-bit parallel FDC which has been implemented in a standard 0.6um CMOS process from Austria Micro Systeme AG (AMS). For a 150 Hz bandwidth the measured SQNR is 146 dB with a clock frequency of 20 MHz.

• Wisland, Dag T; Høvin, Mats Erling; Fleischer, Lars A. & Lande, Tor Sverre (2002). A new scalable non-feedback Delta-Sigma Digital-to-Analog Converter. Show summary

  This paper describes a new noise-shaping D/A-converter which in oposite to the conventional Delta-Sigma modulator has no global feedback. The proposed topology is well suited for a pipelined clocking scheme which leads to increased oversampling ratios for both first and higher order modulators. The maximum clock-frequency of the new modulator is limited only by the delay through one single accumulator regardless of modulator order, which represents a huge saving compared to the conventional modulator. The converter is very modular and scales easily to higher modulator orders. Still the proposed topology is mathematically equivalent to the classical Delta-Sigma modulator. Theoretical analysis and circuit simulations for a first-order converter are presented. The circuit has been implemented in a FPGA-circuit from Altera and measured results are presented.

• Wisland, Dag T; Høvin, Mats Erling & Lande, Tor Sverre (2002). A second-order non-feedback Delta-Sigma modulator for D/A conversion. Show summary

  This paper describes a novel second-order noise-shaping Delta-Sigma modulator without the global feedback found in a conventional Delta-Sigma modulator. The proposed topology allows a pipelined clocking scheme which leads to increased speed-potential and thus higher oversampling ratios compared to conventional topologies. The maximum clock-frequency will now be limited only by the delay through one single accumulator regardless of modulator order which represents a huge saving compared to the conventional modulator. Theoretical analysis and system-level simulations for a second-order converter are presented.

• Høvin, Mats Erling; Wisland, Dag T; Berg, Yngvar & Lande, Tor Sverre (2001). A Delta-Sigma Analog-to-Digital Converter Operating at a Power-Supply Voltage of 0.6V. Show summary

  This paper describes a delta-sigma analog-to-digital converter operating at a power supply voltage of 0.6V. The converter is implemented in a standard AMS 0.6um double poly process, and consists of a frequency-delta-sigma modulator where the transistor threshold voltage is decreased by floating-gate techniques.

• Wisland, Dag T; Høvin, Mats Erling & Lande, Tor Sverre (2001). A 32 kHz Floating-Gate Crystal Oscillator for Ultra Low Voltage Operation Using a Novel Programming Approach. Show summary

  In this paper we present an ultra low-voltage floating-gate crystal oscillator and a novel method for programming the device. The oscillator is designed for operating at a supply voltage down to 0.25 V with an oscillating frequency of 32 kHz. Simulation results for both the programming scheme and oscillator operation are provided along with theoretical discussions. The circuit has been implemented in a 0.6um standard CMOS process.

• Akre, Erlend; Aunet, Snorre; Wisland, Dag Trygve Eckhoff & Kjelgård, Kristian Gjertsen (2023). Ultra Low Power Digital Oscillator with Dynamic Leakage Suppression and compensation In 65nm BULK CMOS and 22nm FDSOI. Universitetet i Oslo, Fysisk Institutt.
• Chen, Yini; Aunet, Snorre & Wisland, Dag Trygve Eckhoff (2023). Frequency Σ ∆ Modulator with ultra-low power supplies towards sub-100 mV. Universitetet i Oslo, Fysisk Institutt.
• Amble, Magnus; Kjelgård, Kristian Gjertsen; Wisland, Dag Trygve Eckhoff & Aunet, Snorre (2023). Cryptographic hardware resistant to Leakage-Based Differential Power Analysis Attacks. Universitetet i Oslo. Show summary

  As cryptographic encryption algorithms have progressed in complexity, adversaries have looked to other means of accessing encrypted secret data than traditional cryptanalysis. One such alternative method of intrusion is through side-channel analysis, where physical properties of a cryptographic circuit are analyzed to reveal sensitive data. This thesis presents analyses of countermeasures against side-channel analysis based on variations in the power consumption of a circuit. A trend seen in the advancement of Complementary Metal–Oxide–Semiconductor(CMOS) technology is an increase in static power consumption. In the context of cryptographic circuits, this aspect of the power consumption has proven to contain information about sensitive data processed by the circuit, making it a potential attack vector for an adversary. Three gate-level countermeasures against leakage power analysis attacks are proposed in this thesis. Two of which are logic styles based on the equalization of a logic gate’s power consumption between input combinations, coined Octuple logic and Quadruple Dual-Pulldown Logic (QDPL). Both of these countermeasures expand on the concept of a countermeasure from the literature called Exhaustive Logic Balancing (ELB). The third proposed countermeasure is a current-masking scheme that introduces input-independent noise in the power consumption through periodically randomizing the voltage on the bulk-terminals of the logic gate. Combining such a logic style with the bulk-voltage masking scheme lowers the possible signal-to-noise ratio obtainable by an adversary by both adding additional noise to, and by lowering the data-dependency in, a circuits power consumption. Preliminary experiments showed that the masking scheme is able to modulate the static current of a ELB NAND gate within an interval where the highest current is six times larger than the lowest current. Subsequently, rough estimates show that if signal averaging analyses are conducted on a register implemented in QDPL, the mask could make the analyses require over 800000 additional signal measurements, compared to when no mask is applied, to find a one-bit hamming weight difference in the register’s static current.

• Moradi, Farshad; Wisland, Dag T; Aunet, Snorre & Berg, Yngvar (2011). Ultra Low Power Digital Circuit Design for Wireless Sensor Network Applications. Universitetet i Oslo. ISSN 1501-7710.
• Wisland, Dag T (2003). Non-feedback <Delta>-<Sigma> modulators for digital-to-analog conversation. Universitetet i Oslo.

View all works in Cristin