Snorre Aunet

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Norwegian version of this page
Phone +47 22852703
Room 5406
Username
Visiting address Ole Johan Dahls hus
Postal address Postboks 1080 Blindern 0316 Oslo

Academic Interests

Ultra low voltage / low power mixed-signal integrated circuits and defect- and error-tolerant circuits and microarchitectures.

Teaching

Higher education and employment history

Education: dr. ing., 2002 (Norwegian University of Science and Technology), cand. scient., 1993 (University of Oslo), electronics engineer, 1987 (Trondheim Technical College).

Academic Work: Different positions at the University of Oslo since 2003, and similar at the Norwegian University of Science and Technology between 1997 and 2009.

Work outside academia include appointments for the EU commission, Nordic VLSI, ABB Corporate Research, Nortroll A/S and the norwegian army (military service).

Cooperation

 Earlier and present research cooperations have included US, german, swedish, UK and norwegian universities.

Tags: Nano- og mikroteknologi

Publications

  • Yassin, Yahya Hussain; Jahre, Magnus; Kjeldsberg, Per Gunnar; Aunet, Snorre & Catthoor, Francky (2021). Fast and Accurate Edge Computing Energy Modeling and DVFS Implementation in GEM5 Using System Call Emulation Mode. Journal of Signal Processing Systems. ISSN 1939-8018. 93(1), p. 33–48. doi: 10.1007/s11265-020-01544-z.
  • Låte, Even; Ytterdal, Trond & Aunet, Snorre (2020). An Energy Efficient Level Shifter Capable of Logic Conversion From Sub-15 mV to 1.2 V. IEEE Transactions on Circuits and Systems - II - Express Briefs. ISSN 1549-7747. 67(11). doi: 10.1109/TCSII.2020.2966654.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2020). Comparative Study of Single, Regular and Flip Well Subthreshold SRAMs in 22 nm FDSOI Technology. In IEEE, . (Eds.), 2020 IEEE Nordic Circuits and Systems Conference (NorCAS) . IEEE. ISSN 978-1-7281-9226-0. doi: 10.1109/NorCAS51424.2020.9265001.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2020). Multi-threshold Voltage and Dynamic Body Biasing Techniques for Energy Efficient Ultra Low Voltage Subthreshold Adders. In IEEE, . (Eds.), 2020 IEEE Nordic Circuits and Systems Conference (NorCAS) . IEEE. ISSN 978-1-7281-9226-0. doi: 10.1109/NorCAS51424.2020.9265131.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2020). An ultra low voltage subthreshold standard cell based memories for IoT applications. In Seyedarabi, Hadi (Eds.), Proceedings, 28th Iranian Conference on Electrical Engineering. IEEE conference proceedings. ISSN 978-1-7281-7296-5. doi: 10.1109/ICEE50131.2020.9260950.
  • Låte, Even; Ytterdal, Trond & Aunet, Snorre (2020). Benefiting From State Dependencies in Asymmetric SRAM Cells Through Conditional Word-Flipping. IEEE Transactions on Very Large Scale Integration (vlsi) Systems. ISSN 1063-8210. 28(10), p. 2223–2227. doi: 10.1109/TVLSI.2020.3013139.
  • Christensen, Steinar Thune; Aunet, Snorre & Qadir, Omer (2019). A Configurable and Versatile Architecture for Low Power, Energy Efficient Hardware Acceleration of Convolutional Neural Networks. In Nurmi, Jari; Ellervee, Peeter; Halonen, Kari & Røning, Juha (Ed.), 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). IEEE. ISSN 9781728127699. doi: 10.1109/NORCHIP.2019.8906950.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2019). Exploring optimal back bias voltages for ultra low voltage CMOS digital Circuits in 22 nm FDSOI Technology. In Nurmi, Jari; Ellervee, Peeter; Halonen, Kari & Røning, Juha (Ed.), 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). IEEE. ISSN 9781728127699. doi: 10.1109/NORCHIP.2019.8906939.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2019). Ultra-Low Voltage Subthreshold Binary Adder Architectures for IoT Applications: Ripple Carry Adder or Kogge Stone Adder. In Nurmi, Jari; Ellervee, Peeter; Halonen, Kari & Røning, Juha (Ed.), 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). IEEE. ISSN 9781728127699. doi: 10.1109/NORCHIP.2019.8906917.
  • Seyedi, Azam; Aunet, Snorre & Kjeldsberg, Per Gunnar (2019). Nwise: an Area Efficient and Highly Reliable Radiation Hardened Memory Cell Designed for Space Applications. In Nurmi, Jari; Ellervee, Peeter; Halonen, Kari & Røning, Juha (Ed.), 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). IEEE. ISSN 9781728127699. doi: 10.1109/NORCHIP.2019.8906911. Full text in Research Archive
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2018). An Ultra-Low Voltage and Low-Energy Level Shifter in 28 nm UTBB-FDSOI. IEEE Transactions on Circuits and Systems - II - Express Briefs. ISSN 1549-7747. 66(6), p. 899–903. doi: 10.1109/TCSII.2018.2871637. Full text in Research Archive
  • Låte, Even; Ytterdal, Trond & Aunet, Snorre (2018). A loadless 6T SRAM cell for sub- & near- threshold operation implementedin 28 nm FD-SOI CMOS technology. Integration. ISSN 0167-9260. 63, p. 56–63. doi: 10.1016/j.vlsi.2018.05.006. Full text in Research Archive
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2018). Comparison of Ultra Low Power Full Adder Cells in 22 nm FDSOI Technology. In Mihhailov, Juri & Jenihhin, Maksim (Ed.), Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). IEEE. ISSN 978-1-5386-7656-1. doi: 10.1109/NORCHIP.2018.8573516. Full text in Research Archive
  • Vatanjou, Ali Asghar; Låte, Even; Ytterdal, Trond & Aunet, Snorre (2017). Ultra-Low Voltage and Energy Efficient Adders in 28 nm FDSOI Exploring Poly-Biasing for Device Sizing. Microprocessors and microsystems. ISSN 0141-9331. 56, p. 92–100. doi: 10.1016/j.micpro.2017.11.002.
  • Låte, Even; Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2017). Extended Comparative Analysis of Flip-Flop Architectures for Subthreshold Applications in 28 nm FD-SOI. Microprocessors and microsystems. ISSN 0141-9331. 48, p. 11–20. doi: 10.1016/j.micpro.2016.07.016.
  • Hasanbegovic, Amir & Aunet, Snorre (2016). Heavy Ion Characterization of Temporal-, Dual- and Triple Redundant Flip-Flops Across a Wide Supply Voltage Range in a 65 nm Bulk CMOS Process. IEEE Transactions on Nuclear Science. ISSN 0018-9499. 63(6), p. 2962–2970. doi: 10.1109/TNS.2016.2614781.
  • Vatanjou, Ali Asghar; Låte, Even; Ytterdal, Trond & Aunet, Snorre (2016). Ultra-Low Voltage Adders in 28 nm FDSOI Exploring Poly-Biasing for Device Sizing. In Jørgensen, Ivan & Sparsøe, Jens (Ed.), Proceedings of the 2nd IEEE Nordic Circuits and Systems Conference (NORCaS), 2016. IEEE conference proceedings. ISSN 978-1-5090-1095-0. doi: 10.1109/NORCHIP.2016.7792895.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2016). 28 nm UTBB-FDSOI energy efficient and variation tolerant custom digital-cell library with application to a subthreshold MAC block. In Napieralski, Andrzej (Eds.), Proceedings of the 23rd International Conference - "Mixed Design of Integrated Circuits and Systems" (MIXDES), Lodz, Poland. IEEE conference proceedings. ISSN 9788363578084. p. 105–110. doi: 10.1109/MIXDES.2016.7529711.
  • Hasanbegovic, Amir & Aunet, Snorre (2015). Supply Voltage Dependency on the Single Event Upset Susceptibility of Temporal Dual-Feedback Flip-Flops in a 90 nm Bulk CMOS Process. IEEE Transactions on Nuclear Science. ISSN 0018-9499. 62(4), p. 1888–1897. doi: 10.1109/TNS.2015.2454479.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). 4 Sub-/Near-Threshold Flip-Flops with Application to Frequency Dividers. In Larsen, Bjørn B. & Fey, Görschwin (Ed.), Proceedings, 2015 European Conference on Circuit Theory and Design. IEEE conference proceedings. ISSN 978-1-4799-9877-7. doi: 10.1109/ECCTD.2015.7300058.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). Exploiting Short Channel Effects and Multi-Vt Technology for Increased Robustness and Reduced Energy Consumption, with Application to a 16-bit Subthreshold Adder Implemented in 65 nm CMOS. In Larsen, Bjørn B. & Fey, Görschwin (Ed.), Proceedings, 2015 European Conference on Circuit Theory and Design. IEEE conference proceedings. ISSN 978-1-4799-9877-7. doi: 10.1109/ECCTD.2015.7300053.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). Energy efficient sub/near-threshold ripple-carry adder in standard 65 nm CMOS. In Hamid, Inon Abdul; Chen, Yiren; Cher, Chen-Yong & Iranmanesh, Ali A. (Ed.), Proceedings of the 6th Asia Symposium on Quality Electronic Design. IEEE conference proceedings. ISSN 978-1-4673-7495-8. p. 7–12. doi: 10.1109/ACQED.2015.7273999.
  • Atarzadeh, Hourieh; Aunet, Snorre & Ytterdal, Trond (2015). An Ultra-Low-Power/High-Speed 9-bit Adder Design: Analysis and Comparison Vs. Technology from 130nm-LP to UTBBFD-SOI-28nm. In Tørresen, Jim; Aunet, Snorre; Lande, Tor Sverre; Grutle, Øyvind Kallevik & Nielsen, Ivan R. (Ed.), Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC), 2015. IEEE conference proceedings. ISSN 978-1-4673-6576-5. doi: 10.1109/NORCHIP.2015.7364365.
  • Låte, Even; Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). Comparative Analysis of Flip-Flop Architectures for Subthreshold Applications in 28nm FDSOI. In Tørresen, Jim; Aunet, Snorre; Lande, Tor Sverre; Grutle, Øyvind Kallevik & Nielsen, Ivan R. (Ed.), Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC), 2015. IEEE conference proceedings. ISSN 978-1-4673-6576-5. doi: 10.1109/NORCHIP.2015.7364372.
  • Bjerkedok, Jonathan Edvard; Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2014). Modular Layout-friendly Cell Library Design Applied for Subthreshold CMOS, Proceedings of the 32nd Norchip Conference. IEEE conference proceedings. ISSN 978-1-4799-5442-1. doi: 10.1109/NORCHIP.2014.7004747.
  • Værnes, Magne; Ytterdal, Trond & Aunet, Snorre (2014). Performance comparison of 5 Subthreshold CMOS flip-flops under process-, voltage-, and temperature variations, based on netlists from layout, Proceedings of the 32nd Norchip Conference. IEEE conference proceedings. ISSN 978-1-4799-5442-1. doi: 10.1109/NORCHIP.2014.7004746.
  • Hasanbegovic, Amir & Aunet, Snorre (2013). Proton Beam Characterization at Oslo Cyclotron Laboratory for Radiation Testing of Electronic Devices. In Sekanina, Lukas; Fey, Görschwin; Raik, Jaan; Aunet, Snorre & Růžička, Richard (Ed.), Proceedings of the 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). IEEE. ISSN 978-1-4673-6133-0. p. 135–140. doi: 10.1109/DDECS.2013.6549805.
  • Berge, Hans Kristian Otnes & Aunet, Snorre (2013). Yield-Oriented Energy and Performance Model for Subthreshold Circuits with Vth Variations. In Sekanina, Lukas; Fey, Görschwin; Raik, Jaan; Aunet, Snorre & Růžička, Richard (Ed.), Proceedings of the 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). IEEE. ISSN 978-1-4673-6133-0. p. 193–198. doi: 10.1109/DDECS.2013.6549815.
  • Lütkemeier, Sven; Jungeblut, Thorsten; Berge, Hans Kristian Otnes; Aunet, Snorre; Porrmann, Mario & Rückert, Ulrich (2013). A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control. IEEE Journal of Solid-State Circuits. ISSN 0018-9200. 48(1), p. 8–19. doi: 10.1109/JSSC.2012.2220671.

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  • Nurmi, Jari; Wisland, Dag Trygve Eckhoff; Kjelgård, Kristian Gjertsen & Aunet, Snorre (2021). Proceedings, 2021 IEEE NORCAS Conference. IEEE. ISBN 978-1-7281-9226-0. 220 p.
  • Nurmi, Jari; Wisland, Dag T; Aunet, Snorre & Kjelgård, Kristian Gjertsen (2020). Proceedings, Sixth IEEE Nordic Circuits and Systems Conference (NorCAS 2020). . IEEE conference proceedings. ISBN 978-1-7281-9226-0. 205 p.
  • Tørresen, Jim; Aunet, Snorre; Lande, Tor Sverre; Grutle, Øyvind Kallevik & Nielsen, Ivan R. (2015). Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC), 2015. IEEE conference proceedings. ISBN 978-1-4673-6576-5. 275 p.

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  • Aunet, Snorre (2021). Ørsmå energihøstende IoT-noder.
  • Zadeh, Somayeh Hossein; Ytterdal, Trond & Aunet, Snorre (2020). An ultra low voltage subthreshold standard cell based memories for IoT applications.
  • Zadeh, Somayeh Hossein; Ytterdal, Trond & Aunet, Snorre (2020). 0 Comparative Study of Single, Regular and Flip well Subthreshold SRAMs in 22 nm FDSOI Technology.
  • Zadeh, Somayeh Hossein; Ytterdal, Trond & Aunet, Snorre (2020). 0 Multi-threshold voltage and dynamic body biasing techniques for energy efficient ultra low voltage subthreshold adders.
  • Zadeh, Somayeh Hossein; Ytterdal, Trond & Aunet, Snorre (2019). Low Energy CMOS building blocks for IoT.
  • Aunet, Snorre (2019). Asynchronous ultra low voltage / low power CMOS - what and why, but not much about how. .
  • Zadeh, Somayeh Hossein; Ytterdal, Trond & Aunet, Snorre (2019). Ultra low voltage subthreshold Binary Adder Architectures for IoT Applications: Ripple Carry Adder or Kogge Stone Adder.
  • Zadeh, Somayeh Hossein; Ytterdal, Trond & Aunet, Snorre (2019). Low Energy CMOS building blocks for IoT.
  • Seyedi, Azam; Aunet, Snorre & Kjeldsberg, Per Gunnar (2019). Towards Compact Radiation Hardened Memories for Space Applications.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2019). Ultra-Low Voltage Subthreshold Binary Adder Architectures for IoT Applications: Ripple Carry Adder or Kogge Stone Adder.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2019). Exploring optimal back bias voltages for ultra low voltage CMOS digital Circuits in 22 nm FDSOI Technology.
  • Aunet, Snorre (2018). Possibilities with ultra low power / low energy integrated circuits.
  • Tørresen, Jim & Aunet, Snorre (2017). Special issue: Selected papers from the 1st NORCAS conference (2015 Nordic Circuits and Systems Conference (NORCAS): Norchip & International Symposium on System-on-Chip (SoC)). Microprocessors and microsystems. ISSN 0141-9331. 48, p. 1–2. doi: 10.1016/j.micpro.2016.11.008.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2017). Ultra-Low Voltage/Energy CMOS Building Blocks in 28 nm FDSOI Technology.
  • Aunet, Snorre (2017). Introduction to ultra-low power electronic circuits design.
  • Aunet, Snorre (2017). Introduction to ultra-low power electronic circuits design.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2016). 28 nm UTBB-FDSOI energy efficient and variation tolerant custom digital-cell library with application to a subthreshold MAC block.
  • Vatanjou, Ali Asghar; Låte, Even; Ytterdal, Trond & Aunet, Snorre (2016). Ultra-Low Voltage Adders in 28 nm FDSOI Exploring Poly-Biasing for Device Sizing.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). 4 Sub-/Near-Threshold Flip-Flops with Application to Frequency Dividers.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). Energy efficient sub/near-threshold ripple-carry adder in standard 65 nm CMOS.
  • Atarzadeh, Hourieh; Aunet, Snorre & Ytterdal, Trond (2015). An Ultra-Low-Power/High-Speed 9-bit Adder Design: Analysis and Comparison Vs. Technology from 130nm-LP to UTBBFD-SOI-28nm.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). Exploiting Short Channel Effects and Multi-Vt Technology for Increased Robustness and Reduced Energy Consumption, with application to a 16-bit Subthreshold Adder Implemented in 65 nm CMOS.
  • Låte, Even; Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). Comparative Analysis of Flip-Flop Architectures for Subthreshold Applications in 28nm FDSOI.
  • Aunet, Snorre (2015). Ultra Low-Voltage / Low energy circuits.
  • Aunet, Snorre (2015). Ultra Low Power / Low Energy Integrated Circuits.
  • Værnes, Magne; Ytterdal, Trond & Aunet, Snorre (2014). Performance comparison of 5 Subthreshold CMOS flip-flops under process-, voltage-, and temperature variations, based on netlists from layout.
  • Bjerkedok, Jonathan Edvard; Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2014). Modular Layout-friendly Cell Library Design Applied for Subthreshold CMOS.
  • Aunet, Snorre (2013). Ultra low voltage CMOS reducing power consumption up to several orders of magnitude, or energy per switching up to 1-2 orders of magnitude.
  • Aunet, Snorre (2013). Low Voltage / Low Energy CMOS.
  • Christensen, Steinar Thune; Aunet, Snorre & Qadir, Omer (2019). En Konfigurerbar og Fleksibel Arkitektur for Laveffekt, Energieffektiv Maskinvareakselerasjon av Nevrale Nettverk basert på Foldning. NTNU.
  • Boland, Connor; Aunet, Snorre & Moldsvor, Øystein (2019). Low Power Environmental Air Quality Monitoring. NTNU.
  • Paintsil, Wesley Ryan; Aunet, Snorre & Moldsvor, Øystein (2019). A comparative study for commercial TVOC sensors. NTNU.
  • Fini, Simone; Ytterdal, Trond; Aunet, Snorre & Lavagno, Luciano (2019). Sub-Threshold Design of Arithmetic Circuits: when Serial might overcome Parallel Architectures. NTNU.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2019). Ultra Low-Power/Low-Energy CMOS Mixed-Signal Building Blocks. NTNU. ISSN 978-82-326-4322-6.
  • Rørstad Helle, Even; Moldsvor, Øystein; Hernes, Bjørnar & Aunet, Snorre (2018). Humidity Sensor. NTNU.
  • Choe, Ju Song; Gheorghe, Codin & Aunet, Snorre (2018). Test system design for a Photomultiplier Readout Board. NTNU.
  • Stubsjøen, Sivert; Moldsvor, Øystein & Aunet, Snorre (2018). Force measurement using a capacitive sensor and a compressible material . NTNU.
  • Paldas, Auritro; Barzic, Ronan & Aunet, Snorre (2018). Towards Predictable Placement of Standard Cells for Regularly Structured Designs. NTNU.
  • Østerhus, Stian; Ytterdal, Trond & Aunet, Snorre (2018). Subthreshold CMOS Cell Library by 22 nm FDSOI Technology. NTNU.
  • L'Orange, Simon; Hagen, Anders; Blekken, Brage; Ytterdal, Trond & Aunet, Snorre (2017). 4-7Ghz Tunable Programmable Pulse Generator in 65nm CMOS. NTNU.
  • Lid, Gunnar; Hagen, Anders; Blekken, Brage; Ytterdal, Trond & Aunet, Snorre (2017). Ultra-low power Design of DSRC modulator/demodulator in 28nm FD_SOI. NTNU.
  • Lesund, Martin; Tjora, Sigve & Aunet, Snorre (2017). Ultra-low power serial communication for Internet of Things. NTNU.
  • Hasanbegovic, Amir; Siem, Sunniva; Søråsen, Oddvar & Aunet, Snorre (2017). Exploring the SEU Dependence on Supply Voltage scaling in 90 nm and 65 nm CMOS Flip-flops. Universitetet i Oslo. Full text in Research Archive
  • Kvam Oma, Åsmund; Låte, Even; Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2016). Design of a near-threshold microcontroller. NTNU.
  • Liknes, Kai Robert; Hernes, Bjørnar & Aunet, Snorre (2016). Ultra Low Leakage Memory. NTNU.
  • Barua, Anomadarshi; Edwin, David & Aunet, Snorre (2016). Voice over mesh network. NTNU.
  • Skjølsvik, Hallstein; Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). Ultra low voltage combinatorial logic building blocks. NTNU.
  • Hals, Erik; Aunet, Snorre; Ramstad, Tor Audun; Hagen, Anders & Blekken, Brage (2015). Lav effekt sensornettverk, for registrering av kjøretøy. NTNU.
  • Zapatero, Miguel & Aunet, Snorre (2015). Synthesis of low-energy near-threshold SHMAC processor core. NTNU.
  • Holen, Aslak Lykre; Ytterdal, Trond & Aunet, Snorre (2015). Implementation and Comparison of Digital Arithmetics for Low Voltage / Low Energy Operation. NTNU.
  • Pedersen, Arne Olav Gurvin; Gheorghe, Codin & Aunet, Snorre (2015). Design of an ASIC Evaluation Kit - Conceptualization, schematic design, PCB layout and preliminary testing of a mixed-signal board. NTNU, Department of Electronics and Telecommunications.
  • By, Mathias; Kile, Eirik & Aunet, Snorre (2015). FPGA Implementation and Evaluation of a Genetic Algorithm for Digital Adaptive Nulling using Space-Time Adaptive Processing. NTNU.
  • Talstad, Joar Nikolai; Diaz, Isael; Øye, Jan Egil & Aunet, Snorre (2015). Channel Filter Cross-Layer Optimization. NTNU, Department of Electronics and Telecommunications.
  • Johnsen, Glenn Andre; Herheim, Jan Rune & Aunet, Snorre (2014). Full-Custom Sub-/Near-Threshold Cell Library in 130nm CMOS with Application to an ALU. NTNU.
  • Green, Allan; Barzic, Ronan & Aunet, Snorre (2014). Ultra-low Power Stack-based Processor for Energy Harvesting Systems. NTNU.
  • Låte, Even; Schanche, Morten; Bugge, Håkon & Aunet, Snorre (2014). Transaction Level Modeling of a PCI Express Root Complex. NTNU.
  • Myrvang Ro, Hans Jørgen; Øye, Jan Egil & Aunet, Snorre (2014). Analysis and Visualisation of Clock Three power in a full-chip-design. NTNU.
  • Dybwad, Patrick; Hasanbegovic, Amir & Aunet, Snorre (2014). Automated Single Event Transient simulation program using high-level programming. Universitetet i Oslo.
  • Samstad Kjøbli, Ole; Aunet, Snorre & Herheim, Jan Rune (2014). Ultra-Low Voltage SRAM in 130 nm CMOS Process. NTNU.
  • Benemann, Danton Canut; Milch Pedersen, Frode & Aunet, Snorre (2014). Ultra-low voltage embedded processor system for Internet-of-Things microcontrollers. Norwegian University of Science and Technology.
  • Taugland Kollerud, Martin; Pihl, Johnny & Aunet, Snorre (2013). Extended Bubble Razor Methodology and its Application to Dynamic Voltage Frequency Scaling Systems. NTNU.
  • Myhre, Petter; Pihl, Johnny & Aunet, Snorre (2013). A novel 55 nm Path Delay Monitor - saving power with DVFS. NTNU.
  • Schjolden, Lars-Frode; Aunet, Snorre & Ytterdal, Trond (2013). Low Energy Implementation of Robust Digital Arithmetic in Sub/Near-Threshold Nanoscale CMOS - for ultrasound beamforming. Norges Teknisk Naturvitenskapelige Universitet.
  • Bjerkedok, Jonathan Edvard; Aunet, Snorre; Grannæs, Marius & Ekelund, Øivind (2013). Subthreshold Real-Time Counter. NTNU.
  • Værnes, Magne; Aunet, Snorre & Hagen, Anders (2013). Trade-offs between Performance and Robustness for Ultra Low Power/Low Energy Subthreshold D flip-flops in 65nm CMOS. NTNU.

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Published Nov. 4, 2010 1:46 PM - Last modified Sep. 24, 2015 11:49 AM