Snorre Aunet

Bilde av Snorre Aunet
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Telefon +47 22852703
Rom 5406
Brukernavn
Besøksadresse Ole Johan Dahls hus
Postadresse Postboks 1080 Blindern 0316 Oslo

Faglige interesser

Ultra lavspenning / laveffekt blandet digitale og analoge kretser. Defekt- og strålingstolerante kretser og mikroarkitekturer.

Undervisning

Bakgrunn

dr. ing., NTNU, 2002.

cand. scient., UiO, 1993.

 

Emneord: subthreshold kretser, defekt tolerante nanorarkitekturer, radhard kretser.

Publikasjoner

  • Seyedi, Azam; Aunet, Snorre & Kjeldsberg, Per Gunnar (2022). Nwise and Pwise: 10T Radiation Hardened SRAM Cells for Space Applications with High Reliability Requirements. IEEE Access. ISSN 2169-3536. 10, s. 30624–30642. doi: 10.1109/ACCESS.2022.3157402.
  • Su, Shengkai; Truong, Binh Duc; Aunet, Snorre & Le, Phu Cuong (2021). A reliable and wide-range tuning technique for low-frequency MEMS energy harvesters. I Jia, Yu (Red.), Proceedings, 2021 IEEE 20th International Conference on Micro and Nanotechnology for Power Generation and Energy Conversion Applications (PowerMEMS). IEEE conference proceedings. ISSN 978-1-6654-2218-5. doi: 10.1109/PowerMEMS54003.2021.9658410.
  • Aunet, Snorre (2021). Ultra Low Voltage Sub-100 mV Vdd CMOS. I Gauberts, Jean & Barragan, Manuel (Red.), Proceedings, 19th IEEE Northeast Workshop on Circuits and Systems (NEWCAS), 2021. IEEE conference proceedings. ISSN 978-1-6654-2429-5. doi: 10.1109/NEWCAS50681.2021.9462735.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2021). Subthreshold Power PC and Nand Race-Free Flip-Flops in Frequency Divider Applications. I Nurmi, Jari; Wisland, Dag Trygve Eckhoff; Aunet, Snorre & Kjelgård, Kristian Gjertsen (Red.), Proceedings, 2021 IEEE Nordic Circuits and Systems Conference (NORCAS). IEEE. ISSN 978-1-6654-0712-0. doi: 10.1109/NorCAS53631.2021.9599871.
  • Yassin, Yahya Hussain; Jahre, Magnus; Kjeldsberg, Per Gunnar; Aunet, Snorre & Catthoor, Francky (2021). Fast and Accurate Edge Computing Energy Modeling and DVFS Implementation in GEM5 Using System Call Emulation Mode. Journal of Signal Processing Systems. ISSN 1939-8018. 93(1), s. 33–48. doi: 10.1007/s11265-020-01544-z. Fulltekst i vitenarkiv
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2020). An ultra low voltage subthreshold standard cell based memories for IoT applications. I Seyedarabi, Hadi (Red.), Proceedings, 28th Iranian Conference on Electrical Engineering. IEEE conference proceedings. ISSN 978-1-7281-7296-5. doi: 10.1109/ICEE50131.2020.9260950.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2020). Comparative Study of Single, Regular and Flip Well Subthreshold SRAMs in 22 nm FDSOI Technology. I IEEE, . (Red.), 2020 IEEE Nordic Circuits and Systems Conference (NorCAS) . IEEE. ISSN 978-1-7281-9226-0. doi: 10.1109/NorCAS51424.2020.9265001.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2020). Multi-threshold Voltage and Dynamic Body Biasing Techniques for Energy Efficient Ultra Low Voltage Subthreshold Adders. I IEEE, . (Red.), 2020 IEEE Nordic Circuits and Systems Conference (NorCAS) . IEEE. ISSN 978-1-7281-9226-0. doi: 10.1109/NorCAS51424.2020.9265131.
  • Låte, Even; Ytterdal, Trond & Aunet, Snorre (2020). Benefiting From State Dependencies in Asymmetric SRAM Cells Through Conditional Word-Flipping. IEEE Transactions on Very Large Scale Integration (vlsi) Systems. ISSN 1063-8210. 28(10), s. 2223–2227. doi: 10.1109/TVLSI.2020.3013139.
  • Låte, Even; Ytterdal, Trond & Aunet, Snorre (2020). An Energy Efficient Level Shifter Capable of Logic Conversion From Sub-15 mV to 1.2 V. IEEE Transactions on Circuits and Systems - II - Express Briefs. ISSN 1549-7747. 67(11). doi: 10.1109/TCSII.2020.2966654.
  • Christensen, Steinar Thune; Aunet, Snorre & Qadir, Omer (2019). A Configurable and Versatile Architecture for Low Power, Energy Efficient Hardware Acceleration of Convolutional Neural Networks. I Nurmi, Jari; Ellervee, Peeter; Halonen, Kari & Røning, Juha (Red.), 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). IEEE. ISSN 9781728127699. doi: 10.1109/NORCHIP.2019.8906950.
  • Seyedi, Azam; Aunet, Snorre & Kjeldsberg, Per Gunnar (2019). Nwise: an Area Efficient and Highly Reliable Radiation Hardened Memory Cell Designed for Space Applications. I Nurmi, Jari; Ellervee, Peeter; Halonen, Kari & Røning, Juha (Red.), 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). IEEE. ISSN 9781728127699. doi: 10.1109/NORCHIP.2019.8906911. Fulltekst i vitenarkiv
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2019). Exploring optimal back bias voltages for ultra low voltage CMOS digital Circuits in 22 nm FDSOI Technology. I Nurmi, Jari; Ellervee, Peeter; Halonen, Kari & Røning, Juha (Red.), 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). IEEE. ISSN 9781728127699. doi: 10.1109/NORCHIP.2019.8906939.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2019). Ultra-Low Voltage Subthreshold Binary Adder Architectures for IoT Applications: Ripple Carry Adder or Kogge Stone Adder. I Nurmi, Jari; Ellervee, Peeter; Halonen, Kari & Røning, Juha (Red.), 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). IEEE. ISSN 9781728127699. doi: 10.1109/NORCHIP.2019.8906917.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2018). Comparison of Ultra Low Power Full Adder Cells in 22 nm FDSOI Technology. I Mihhailov, Juri & Jenihhin, Maksim (Red.), Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). IEEE. ISSN 978-1-5386-7656-1. doi: 10.1109/NORCHIP.2018.8573516. Fulltekst i vitenarkiv
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2018). An Ultra-Low Voltage and Low-Energy Level Shifter in 28 nm UTBB-FDSOI. IEEE Transactions on Circuits and Systems - II - Express Briefs. ISSN 1549-7747. 66(6), s. 899–903. doi: 10.1109/TCSII.2018.2871637. Fulltekst i vitenarkiv
  • Låte, Even; Ytterdal, Trond & Aunet, Snorre (2018). A loadless 6T SRAM cell for sub- & near- threshold operation implementedin 28 nm FD-SOI CMOS technology. Integration. ISSN 0167-9260. 63, s. 56–63. doi: 10.1016/j.vlsi.2018.05.006. Fulltekst i vitenarkiv
  • Vatanjou, Ali Asghar; Låte, Even; Ytterdal, Trond & Aunet, Snorre (2017). Ultra-Low Voltage and Energy Efficient Adders in 28 nm FDSOI Exploring Poly-Biasing for Device Sizing. Microprocessors and microsystems. ISSN 0141-9331. 56, s. 92–100. doi: 10.1016/j.micpro.2017.11.002.
  • Låte, Even; Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2017). Extended Comparative Analysis of Flip-Flop Architectures for Subthreshold Applications in 28 nm FD-SOI. Microprocessors and microsystems. ISSN 0141-9331. 48, s. 11–20. doi: 10.1016/j.micpro.2016.07.016.
  • Vatanjou, Ali Asghar; Låte, Even; Ytterdal, Trond & Aunet, Snorre (2016). Ultra-Low Voltage Adders in 28 nm FDSOI Exploring Poly-Biasing for Device Sizing. I Jørgensen, Ivan & Sparsøe, Jens (Red.), Proceedings of the 2nd IEEE Nordic Circuits and Systems Conference (NORCaS), 2016. IEEE conference proceedings. ISSN 978-1-5090-1095-0. doi: 10.1109/NORCHIP.2016.7792895.
  • Hasanbegovic, Amir & Aunet, Snorre (2016). Heavy Ion Characterization of Temporal-, Dual- and Triple Redundant Flip-Flops Across a Wide Supply Voltage Range in a 65 nm Bulk CMOS Process. IEEE Transactions on Nuclear Science. ISSN 0018-9499. 63(6), s. 2962–2970. doi: 10.1109/TNS.2016.2614781.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2016). 28 nm UTBB-FDSOI energy efficient and variation tolerant custom digital-cell library with application to a subthreshold MAC block. I Napieralski, Andrzej (Red.), Proceedings of the 23rd International Conference - "Mixed Design of Integrated Circuits and Systems" (MIXDES), Lodz, Poland. IEEE conference proceedings. ISSN 9788363578084. s. 105–110. doi: 10.1109/MIXDES.2016.7529711.
  • Låte, Even; Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). Comparative Analysis of Flip-Flop Architectures for Subthreshold Applications in 28nm FDSOI. I Tørresen, Jim; Aunet, Snorre; Lande, Tor Sverre; Grutle, Øyvind Kallevik & Nielsen, Ivan R. (Red.), Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC), 2015. IEEE conference proceedings. ISSN 978-1-4673-6576-5. doi: 10.1109/NORCHIP.2015.7364372.
  • Atarzadeh, Hourieh; Aunet, Snorre & Ytterdal, Trond (2015). An Ultra-Low-Power/High-Speed 9-bit Adder Design: Analysis and Comparison Vs. Technology from 130nm-LP to UTBBFD-SOI-28nm. I Tørresen, Jim; Aunet, Snorre; Lande, Tor Sverre; Grutle, Øyvind Kallevik & Nielsen, Ivan R. (Red.), Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC), 2015. IEEE conference proceedings. ISSN 978-1-4673-6576-5. doi: 10.1109/NORCHIP.2015.7364365.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). 4 Sub-/Near-Threshold Flip-Flops with Application to Frequency Dividers. I Larsen, Bjørn B. & Fey, Görschwin (Red.), Proceedings, 2015 European Conference on Circuit Theory and Design. IEEE conference proceedings. ISSN 978-1-4799-9877-7. doi: 10.1109/ECCTD.2015.7300058.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). Exploiting Short Channel Effects and Multi-Vt Technology for Increased Robustness and Reduced Energy Consumption, with Application to a 16-bit Subthreshold Adder Implemented in 65 nm CMOS. I Larsen, Bjørn B. & Fey, Görschwin (Red.), Proceedings, 2015 European Conference on Circuit Theory and Design. IEEE conference proceedings. ISSN 978-1-4799-9877-7. doi: 10.1109/ECCTD.2015.7300053.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). Energy efficient sub/near-threshold ripple-carry adder in standard 65 nm CMOS. I Hamid, Inon Abdul; Chen, Yiren; Cher, Chen-Yong & Iranmanesh, Ali A. (Red.), Proceedings of the 6th Asia Symposium on Quality Electronic Design. IEEE conference proceedings. ISSN 978-1-4673-7495-8. s. 7–12. doi: 10.1109/ACQED.2015.7273999.
  • Hasanbegovic, Amir & Aunet, Snorre (2015). Supply Voltage Dependency on the Single Event Upset Susceptibility of Temporal Dual-Feedback Flip-Flops in a 90 nm Bulk CMOS Process. IEEE Transactions on Nuclear Science. ISSN 0018-9499. 62(4), s. 1888–1897. doi: 10.1109/TNS.2015.2454479.

Se alle arbeider i Cristin

  • Nurmi, Jari; Wisland, Dag Trygve Eckhoff; Aunet, Snorre & Kjelgård, Kristian Gjertsen (2021). Proceedings, 2021 IEEE Nordic Circuits and Systems Conference (NORCAS). IEEE. ISBN 978-1-6654-0712-0. 220 s.
  • Nurmi, Jari; Wisland, Dag T; Aunet, Snorre & Kjelgård, Kristian Gjertsen (2020). Proceedings, Sixth IEEE Nordic Circuits and Systems Conference (NorCAS 2020). . IEEE conference proceedings. ISBN 978-1-7281-9226-0. 205 s.
  • Tørresen, Jim; Aunet, Snorre; Lande, Tor Sverre; Grutle, Øyvind Kallevik & Nielsen, Ivan R. (2015). Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC), 2015. IEEE conference proceedings. ISBN 978-1-4673-6576-5. 275 s.

Se alle arbeider i Cristin

  • Su, Shengkai; Truong, Binh Duc; Aunet, Snorre & Le, Phu Cuong (2021). A reliable and wide-range tuning technique for low-frequency MEMS energy harvesters.
  • Aunet, Snorre & Aunet, Snorre (2021). Ultra Low Voltage Sub-100 mV Vdd CMOS.
  • Zadeh, Somayeh Hossein; Ytterdal, Trond & Aunet, Snorre (2021). Subthreshold Power PC and Nand Race-Free Flip-Flops in Frequency Divider Applications.
  • Aunet, Snorre (2021). Ørsmå energihøstende IoT-noder.
  • Zadeh, Somayeh Hossein; Ytterdal, Trond & Aunet, Snorre (2020). 0 Comparative Study of Single, Regular and Flip well Subthreshold SRAMs in 22 nm FDSOI Technology.
  • Zadeh, Somayeh Hossein; Ytterdal, Trond & Aunet, Snorre (2020). 0 Multi-threshold voltage and dynamic body biasing techniques for energy efficient ultra low voltage subthreshold adders.
  • Zadeh, Somayeh Hossein; Ytterdal, Trond & Aunet, Snorre (2020). An ultra low voltage subthreshold standard cell based memories for IoT applications.
  • Seyedi, Azam; Aunet, Snorre & Kjeldsberg, Per Gunnar (2019). Towards Compact Radiation Hardened Memories for Space Applications.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2019). Exploring optimal back bias voltages for ultra low voltage CMOS digital Circuits in 22 nm FDSOI Technology.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2019). Ultra-Low Voltage Subthreshold Binary Adder Architectures for IoT Applications: Ripple Carry Adder or Kogge Stone Adder.
  • Zadeh, Somayeh Hossein; Ytterdal, Trond & Aunet, Snorre (2019). Ultra low voltage subthreshold Binary Adder Architectures for IoT Applications: Ripple Carry Adder or Kogge Stone Adder.
  • Zadeh, Somayeh Hossein; Ytterdal, Trond & Aunet, Snorre (2019). Low Energy CMOS building blocks for IoT.
  • Zadeh, Somayeh Hossein; Ytterdal, Trond & Aunet, Snorre (2019). Low Energy CMOS building blocks for IoT.
  • Aunet, Snorre (2019). Asynchronous ultra low voltage / low power CMOS - what and why, but not much about how. .
  • Aunet, Snorre (2018). Possibilities with ultra low power / low energy integrated circuits.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2017). Ultra-Low Voltage/Energy CMOS Building Blocks in 28 nm FDSOI Technology.
  • Aunet, Snorre (2017). Introduction to ultra-low power electronic circuits design.
  • Aunet, Snorre (2017). Introduction to ultra-low power electronic circuits design.
  • Tørresen, Jim & Aunet, Snorre (2017). Special issue: Selected papers from the 1st NORCAS conference (2015 Nordic Circuits and Systems Conference (NORCAS): Norchip & International Symposium on System-on-Chip (SoC)). Microprocessors and microsystems. ISSN 0141-9331. 48, s. 1–2. doi: 10.1016/j.micpro.2016.11.008.
  • Vatanjou, Ali Asghar; Låte, Even; Ytterdal, Trond & Aunet, Snorre (2016). Ultra-Low Voltage Adders in 28 nm FDSOI Exploring Poly-Biasing for Device Sizing.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2016). 28 nm UTBB-FDSOI energy efficient and variation tolerant custom digital-cell library with application to a subthreshold MAC block.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). Energy efficient sub/near-threshold ripple-carry adder in standard 65 nm CMOS.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). Exploiting Short Channel Effects and Multi-Vt Technology for Increased Robustness and Reduced Energy Consumption, with application to a 16-bit Subthreshold Adder Implemented in 65 nm CMOS.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). 4 Sub-/Near-Threshold Flip-Flops with Application to Frequency Dividers.
  • Låte, Even; Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). Comparative Analysis of Flip-Flop Architectures for Subthreshold Applications in 28nm FDSOI.
  • Atarzadeh, Hourieh; Aunet, Snorre & Ytterdal, Trond (2015). An Ultra-Low-Power/High-Speed 9-bit Adder Design: Analysis and Comparison Vs. Technology from 130nm-LP to UTBBFD-SOI-28nm.
  • Aunet, Snorre (2015). Ultra Low Power / Low Energy Integrated Circuits.
  • Aunet, Snorre (2015). Ultra Low-Voltage / Low energy circuits.
  • Værnes, Magne; Ytterdal, Trond & Aunet, Snorre (2014). Performance comparison of 5 Subthreshold CMOS flip-flops under process-, voltage-, and temperature variations, based on netlists from layout.
  • Bjerkedok, Jonathan Edvard; Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2014). Modular Layout-friendly Cell Library Design Applied for Subthreshold CMOS.
  • Hossein Zadeh, Somayeh; Ytterdal, Trond & Aunet, Snorre (2022). Energy Efficient Subthreshold Digital Building Blocks . NTNU. ISSN 1503-8181.
  • Steinsland, Christian Rosioara; Aunet, Snorre & Ytterdal, Trond (2021). Design and Implementation of a Digital Standard Cell Library for 28 nm Technology. NTNU.
  • Rud, Markus; Moldsvor, Øystein & Aunet, Snorre (2021). Power and energy consumption in hardware implemented SPI master devices. NTNU.
  • Nielsen, Auseth, Øivind; Aunet, Snorre & Ness, Torbjørn Viem (2021). Modelling of Cache/Interconnect Performance in an Embedded System. NTNU.
  • Skavnes, Solveig; Moldsvor, Øystein; Hagen, Anders Ivar & Aunet, Snorre (2021). Design and Implementation of a Magnetic Energy Harvesting System for Low Primary Current Applications. NTNU.
  • Rotevatn, Synnøve Andersen; Barzic, Ronan & Aunet, Snorre (2021). Automated Desynchronization Using Pyverilog. NTNU.
  • Aunet, Snorre; Ytterdal, Trond; Lande, Tor Sverre & Moulin, Kaspar Sigurd (2021). Low-Power Neuromorphic Sound Source Localization. NTNU.
  • Låte, Even; Ytterdal, Trond & Aunet, Snorre (2021). Low Voltage Logic and Memories on Silicon. NTNU. ISSN 978-82-326-6512-9.
  • Schoepe, Felix Allan; Gamst Reichelt, Pål Øyvind & Aunet, Snorre (2020). Ultra-low power accurate temperature sensor for IoT. NTNU.
  • Bygland, Embla Trasti; Austbø, Knut & Aunet, Snorre (2020). Power Modeling of Complex Designs. NTNU.
  • Dieset, Herman Kristian; Qadir, Omer & Aunet, Snorre (2020). Approximate Arithmetical Operators for Energy Efficient Inference in Deep Neural Networks. NTNU.
  • Gausdal, Kaja; Gonsholt, Kyrre Erlend; Qadir, Omer & Aunet, Snorre (2020). Applying Asynchronous Completion Detection to the AVS Domain. NTNU.
  • Fini, Simone; Ytterdal, Trond; Aunet, Snorre & Lavagno, Luciano (2019). Sub-Threshold Design of Arithmetic Circuits: when Serial might overcome Parallel Architectures. NTNU.
  • Boland, Connor; Aunet, Snorre & Moldsvor, Øystein (2019). Low Power Environmental Air Quality Monitoring. NTNU.
  • Christensen, Steinar Thune; Aunet, Snorre & Qadir, Omer (2019). En Konfigurerbar og Fleksibel Arkitektur for Laveffekt, Energieffektiv Maskinvareakselerasjon av Nevrale Nettverk basert på Foldning. NTNU.
  • Paintsil, Wesley Ryan; Aunet, Snorre & Moldsvor, Øystein (2019). A comparative study for commercial TVOC sensors. NTNU.
  • Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2019). Ultra Low-Power/Low-Energy CMOS Mixed-Signal Building Blocks. NTNU. ISSN 978-82-326-4322-6.
  • Choe, Ju Song; Gheorghe, Codin & Aunet, Snorre (2018). Test system design for a Photomultiplier Readout Board. NTNU.
  • Østerhus, Stian; Ytterdal, Trond & Aunet, Snorre (2018). Subthreshold CMOS Cell Library by 22 nm FDSOI Technology. NTNU.
  • Stubsjøen, Sivert; Moldsvor, Øystein & Aunet, Snorre (2018). Force measurement using a capacitive sensor and a compressible material . NTNU.
  • Paldas, Auritro; Barzic, Ronan & Aunet, Snorre (2018). Towards Predictable Placement of Standard Cells for Regularly Structured Designs. NTNU.
  • Rørstad Helle, Even; Moldsvor, Øystein; Hernes, Bjørnar & Aunet, Snorre (2018). Humidity Sensor. NTNU.
  • Lesund, Martin; Tjora, Sigve & Aunet, Snorre (2017). Ultra-low power serial communication for Internet of Things. NTNU.
  • Lid, Gunnar; Hagen, Anders; Blekken, Brage; Ytterdal, Trond & Aunet, Snorre (2017). Ultra-low power Design of DSRC modulator/demodulator in 28nm FD_SOI. NTNU.
  • L'Orange, Simon; Hagen, Anders; Blekken, Brage; Ytterdal, Trond & Aunet, Snorre (2017). 4-7Ghz Tunable Programmable Pulse Generator in 65nm CMOS. NTNU.
  • Hasanbegovic, Amir; Siem, Sunniva; Søråsen, Oddvar & Aunet, Snorre (2017). Exploring the SEU Dependence on Supply Voltage scaling in 90 nm and 65 nm CMOS Flip-flops. Universitetet i Oslo. Fulltekst i vitenarkiv
  • Liknes, Kai Robert; Hernes, Bjørnar & Aunet, Snorre (2016). Ultra Low Leakage Memory. NTNU.
  • Barua, Anomadarshi; Edwin, David & Aunet, Snorre (2016). Voice over mesh network. NTNU.
  • Kvam Oma, Åsmund; Låte, Even; Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2016). Design of a near-threshold microcontroller. NTNU.
  • Zapatero, Miguel & Aunet, Snorre (2015). Synthesis of low-energy near-threshold SHMAC processor core. NTNU.
  • Hals, Erik; Aunet, Snorre; Ramstad, Tor Audun; Hagen, Anders & Blekken, Brage (2015). Lav effekt sensornettverk, for registrering av kjøretøy. NTNU.
  • Holen, Aslak Lykre; Ytterdal, Trond & Aunet, Snorre (2015). Implementation and Comparison of Digital Arithmetics for Low Voltage / Low Energy Operation. NTNU.
  • Talstad, Joar Nikolai; Diaz, Isael; Øye, Jan Egil & Aunet, Snorre (2015). Channel Filter Cross-Layer Optimization. NTNU, Department of Electronics and Telecommunications.
  • Pedersen, Arne Olav Gurvin; Gheorghe, Codin & Aunet, Snorre (2015). Design of an ASIC Evaluation Kit - Conceptualization, schematic design, PCB layout and preliminary testing of a mixed-signal board. NTNU, Department of Electronics and Telecommunications.
  • By, Mathias; Kile, Eirik & Aunet, Snorre (2015). FPGA Implementation and Evaluation of a Genetic Algorithm for Digital Adaptive Nulling using Space-Time Adaptive Processing. NTNU.
  • Skjølsvik, Hallstein; Vatanjou, Ali Asghar; Ytterdal, Trond & Aunet, Snorre (2015). Ultra low voltage combinatorial logic building blocks. NTNU.

Se alle arbeider i Cristin

Publisert 4. nov. 2010 13:46 - Sist endret 28. nov. 2019 09:37

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