Disputation: Shiji Bijo

Doctoral candidate Shiji Bijo at the Department of informatics, Faculty of Mathematics and Natural Sciences, is defending the thesis Formal Modelling of Cache Coherent Multicore Architectures for the degree of Philosophiae Doctor.

Picture of the candidate

Photo: Private

The University of Oslo is closed. The PhD defence and trial lecture will therefore be fully digital and streamed directly using Zoom. The host of the session will moderate the technicalities while the chair of the defence will moderate the disputation.

Ex auditorio questions: the chair of the defence will invite the audience to ask ex auditorio questions either written or oral. This can be requested by clicking 'Participants -> Raise hand'. 

Trial lecture

"Decision trees for Learning”

Main research findings

 

Multicore architectures aim to improve execution speed of software through parallel computations. Large-scale multicore systems have massively parallel hardware architectures. The development of parallel programs which can exploit the multicore architecture is a non-trivial task for the software industry. Analysing the effect of different architectures during software development helps to uncover cases that may affect the performance.

This thesis studies at the theoretical level how the underlying architecture and data movements between cores and memory systems may influence the program performance. The main contribution of this thesis is a detailed formal model of multicore architectures along with an associated proof-of-concept analysis tool.

One of the main challenges in characterising the core-memory communication patterns in multicore systems is the consistency of shared data in different memory levels. The formalisation is used to guarantee consistency of shared data for all architectures that can be expressed in our formal model.

The formal model captures interactions between cores and memory and the tool provides a model-based simulation environment to examine the effect of different multicore architectures on performance during parallel executions.

    Publisert 27. apr. 2021 12:59 - Sist endret 6. mai 2021 11:24