Nettsider med emneord «ADC»

CMOS image sensors (CIS) are widely adopted in many application fields, such as industry control system, automotive, consumer electronics, surveillance system, and so on. Inside of a CIS, a column-ADC based readout architecture is commonly employed because of its high-speed and low-noise readout capability. To improve readout speed and noise performance of column-parallel readout architecture, a compact and efficient column ADC structure is desired. A VCO-based voltage-to-frequency or voltage-to-digital converter is a promising candidate for real column level ADC that could be contained completely inside of column array.

Time interleaving of ADCs allows for conversion rates that are not feasible using a single channel ADC. However, mismatch among the channels impact parameters such as offset, timing, gain, and bandwidth, giving rise to undesirable artifacts in the sampled signal.