CMOS image sensors (CIS) are widely adopted in various applications for example mobile and automotive cameras. As the application expanding their functionality to motion sensing and autonomous driving, the applications keep demanding for higher resolution and faster operating CIS while maintaining the power budget. Therefore, implementing CIS with low-noise and low-power analogue front end (AFE) is essential. Moreover, in an advanced process, conventional analogue design approaches have many challenges such as lower intrinsic gain of devices, and smaller headroom for operation. Therefore, a new structure is highly required to meet the requirements and to solve the challenges. A current-reusing architecture, as the name self-explained, utilizes the supply current to generate transconductance of both PMOS and NMOS. Therefore, the structure could improve gain, bandwidth, and noise characteristics comparing to the conventional analogue stages. For this reason, architecture is a suitable candidate for the solution.
This project is a collaboration with SONY Semiconductor Solutions Europe
The goal is to design a current-reusing analogue front end for CIS and verify the advantages in simulation and measurement.
The student will investigate the requirement of CIS AFE and the advantage of the existing current re-using structures. She or he will design the novel AFE in an advanced CMOS process and measure the design to demonstrate the improvements.