Infra-red image sensor in a “3-dimentional” CMOS process

Through the EU-funded 3D-MUSE project, we can design in one of the most advanced CMOS technologies available. We also get a taste of technologies that will not be widely available until a few years from now. Within this project, the ASIC design company Ideas together with IFI want to offer a master project where some key elements for a sensor system shall be designed.

Bildet kan inneholde: eiendom, produkt, gjøre, rektangel, linje.

Double transistor layer CMOS process, Triple layer bolometer and microbolometer

Today, the standard is to make transistors on the surface of a silicon wafer (i.e. two-dimensionally). This technology has its limitation due to long signal lines, which means both lower speed and higher power consumption. In the longer term, there is a great potential in producing transistors in several layers. This provides opportunities for much denser structures and new functionality in that specialized parts (light-sensitive pixels and other sensors, analog cells, digital cells) can be placed on top of each other. We are part of an EU-funded research project (3D-MUSE) together with leading groups in this field where the target is to design for transistors in two layers.

A sensor that may benefit from the potential for 3D is IR (Infra Red) imaging i.e. taking pictures or video measuring temperature. Such sensors find their use within a broad range of applications like gas and pollution detection, building and isolation tests, agriculture, medical and movement alarms, detections of animals along roads and rescue detection of humans and animals. IR imaging sensors can be implemented as a matrix of microbolometer pixels. A microbolometer is a temperature sensitive resistor, typically of size between 25um x 25um and 12um x 12um implemented directly on top of an integrated circuit with electronic readout circuitry directly beneath the bolometer. The readout circuitry beneath is required both to reduce noise and compensate for the large production variation for bolometers. With a two-transistor layer process the area available for noise reduction and variation compensation would become twice, significantly improving the measurement quality. (Then we will in fact have a three-layer process with digital circuitry at the bottom, analog above and the bolometer sensor on top.)


Possible master's theses:

A master project within this field is suitable for someone who is interested in working with technology at the forefront. We are primarily interested in a student who has and wants to further develop competence in CMOS design. We are interested both in noise reduction for the bolometer sensor (analog) and in variation compensation (digital). We also already have circuits under production in the 3D-MUSE project (circuits for light radars) so a student who would like to make test setups and do measurements are also interesting. A master student will mainly work with software development tools at the university, but some time in the lab at Ideas in Nydalen may also be relevant. A student will receive a combination of individual supervision and group supervision together with other students within the 3DMUSE project.

The main supervisor is Joar Martin Østby who is employed at both Ideas and the University of Oslo

Emneord: Nanoelectronics, CMOS, sensor technology, 3D ASIC design
Publisert 22. aug. 2021 13:07 - Sist endret 24. aug. 2021 08:19


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