Simulation of 3D integrated photo pixel ADC

This is a project contributing the EU research project 3D-MUSE. 3D-MUSE develops 3D integrated circuit technology, where transistors are not only implemented on a 2D chip but can be stacked on top of each other, allowing for extremely dense integrated circuits. One highly interesting application of this will be image sensors, where 3D circuits can be placed behind each pixel without reducing the resolution of the sensor.

The Sony Exmor RS image sensors are at the forefront of 3D inegrated electronic circuits. In particular for image sensors, 3D integration can reap huge benefits: the density of 3D integration behind the actual sensor allows for more paralleism when it comes to process images, i.e. image data is not completely serialized for read-out and for every processing step along the way. Instead, 'smart' image sensors can have an array of processing units in place in the image sensor itself and there can be one unit for a region of the image or in the future even for each single pixel.

The 3D integration technology developed in the 3D-MUSE project is aiming at enabling exactly that future towards full parallel image processing, at least for the first few basic image processing steps and this MSc project is a first step. It will aim at implementing the most  basic operation to be executed by a dedicated circuit in each pixel, without impairing the image resolution of the sensor. That operation is the analog to digital conversion (ADC) of the pixel value.

However, the technology is very experimental at this stage, and actually producing such an imager concept will take more time than the 3 semesters that are availabele for a master project. Thus, this project will involve the first step, and use the 3D design tools that are available in the project to develop the concept of a 3D in-pixel ADC.

Candidates need some skills with the Cadence tools, in particular the layout design tool Virtuoso to begin with, will design the circuit in schematics and in layout, and test the concept thoroughly in simulation and analyse the performance as opposed to serial solutions and 2D implementations.

Emneord: 3D ASIC design
Publisert 1. okt. 2019 11:05 - Sist endret 1. okt. 2019 11:05

Veileder(e)

Omfang (studiepoeng)

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